CY7C65631-56LTXCT Cypress Semiconductor Corp, CY7C65631-56LTXCT Datasheet

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CY7C65631-56LTXCT

Manufacturer Part Number
CY7C65631-56LTXCT
Description
CY7C65631-56LTXCT
Manufacturer
Cypress Semiconductor Corp
Datasheet

Specifications of CY7C65631-56LTXCT

Lead Free Status / Rohs Status
Compliant
Features
Cypress Semiconductor Corporation
Document #: 001-52934 Rev. *B
Block Diagram CY7C65631
USB 2.0 hub controller
Automotive AEC grade option (–40 °C to +85 °C)
Compliant with the USB 2.0 specification
USB-IF certified: TID# 30000009
Windows Hardware Quality Lab (WHQL) compliant
Up to four downstream ports supported
Supports bus powered and self powered modes
Single Transaction Translator (TT)
Bus power configurations
Fit, form, and function compatible with CY7C65640 and
CY7C65640A (TetraHub™)
Space saving 56-pin QFN
Single power supply requirement
Integrated upstream pull up resistor
Integrated pull down resistors for all downstream ports
Integrated upstream and downstream termination resistors
Integrated port status indicator control
24 MHz external crystal (integrated phase locked loop (PLL))
Internal regulator for reduced cost
24 MHz
Crystal
D+
USB 2.0
USB Downstream Port 1
PHY
D- PWR#[1]
Low Power USB 2.0 Hub Controller Family
D+
USB Upstream Port
PLL
198 Champion Court
Port Power
Hub Repeater
USB 2.0 PHY
Control
OVR#[1]
Status
Port
LED
D -
D+
USB 2.0
USB Downstream Port 2
PHY
D- PWR#[2]
Port Power
Control
OVR#[2]
In-system EEPROM programming
Configurable with external SPI EEPROM:
Vendor ID, Product ID, Device ID (VID/PID/DID)
Number of active ports
Number of removable ports
Maximum power setting for high speed and full speed
Hub controller power setting
Power on timer
Overcurrent detection mode
Enabled and disabled overcurrent timer
Overcurrent pin polarity
Indicator pin polarity
Compound device
Enable full speed only
Disable port indicators
Ganged power switching
Self and bus powered compatibility
Fully configurable string descriptors for multiple language
support
Interface
Engine
Serial
Status
Port
Routing Logic
LED
D+
Transaction Translator
USB 2.0
USB Downstream Port 3
San Jose
PHY
D-
TT RAM
PWR#[3]
Port Power
Control
EZ-USB HX2LP Lite™
OVR#[3]
,
CA 95134-1709
Status
Port
LED
SPI Communication
USB Control Logic
D+
USB 2.0
USB Downstream Port 4
PHY
High-Speed
D-
Block
PWR#[4]
Port Power
Control
OVR#[4]
CY7C65621/31
Revised June 16, 2010
Status
Port
LED
•408-943-2600
SPI_SCK
SPI_SD
SPI_CS
[+] Feedback

Related parts for CY7C65631-56LTXCT

CY7C65631-56LTXCT Summary of contents

Page 1

... Integrated upstream and downstream termination resistors ■ Integrated port status indicator control ■ 24 MHz external crystal (integrated phase locked loop (PLL)) Block Diagram CY7C65631 24 MHz Crystal Cypress Semiconductor Corporation Document #: 001-52934 Rev. *B Low Power USB 2.0 Hub Controller Family ■ ...

Page 2

Block Diagram CY7C65621 D+ 24 MHz Crystal USB Upstream Port Document #: 001-52934 Rev USB 2.0 PHY Serial Interface PLL Engine Transaction Translator (X1) Hub Repeater Routing Logic USB Downstream Port 1 USB 2.0 Port Port Power ...

Page 3

... Contents Features ...............................................................................1 Block Diagram CY7C65631 ................................................1 Block Diagram CY7C65621 ................................................2 Contents ..............................................................................3 Introduction .........................................................................4 USB Serial Interface Engine ..........................................4 Hub Repeater ................................................................4 Transaction Translator ..................................................4 Applications ........................................................................4 Functional Overview ..........................................................4 System Initialization .......................................................4 Enumeration ..................................................................4 Downstream Ports .........................................................5 Upstream Port ...............................................................5 Power Switching ............................................................5 Overcurrent Detection ...................................................5 Port Indicators ...............................................................5 Pin Configuration ...............................................................7 Pin Description Table .........................................................8 Default Descriptors ..........................................................10 Device Descriptor ...

Page 4

... CY7C65631: 4-port/single transaction translator This device option is for ultra low power applications that re- quire four downstream ports. All four ports share a single transaction translator. The CY7C65631 is available QFN and is also pin-for-pin compatible with the CY7C65640. 2. CY7C65621: This device option is for a 2-port bus powered application. ...

Page 5

Downstream Ports The CY7C65621/31 supports a maximum of four downstream ports, each of which may be marked as usable or removable in the extended configuration (0xD2 EEPROM load or 0xD4 EEPROM load, see Configuration Options Downstream D+ and D– pull ...

Page 6

Table 1. Automatic Port State to Port Indicator Color Mapping Disconnected, Disabled, Powered Off Not Configured, Resetting, Testing Off or Amber, if due to an Off Overcurrent Condition 1. Information presented in Table 1 is from USB 2.0 Specification Tables ...

Page 7

Pin Configuration Figure 1. 56-Pin Quad Flat Pack No Leads ( mm DD–[4]/NC 1 DD+[4]/NC 2 VCC 3 GND 4 DD–[3]/NC 5 DD+[3]/NC 6 VCC 7 GND 8 9 DD–[2] DD+[2] 10 VCC 11 ...

Page 8

... Pin Description Table x [1] Table 3. Pin Assignments CY7C65631 CY7C65621 Pin Name Name 3 VCC VCC 7 VCC VCC 11 VCC VCC 15 VCC VCC 19 VCC VCC 23 VCC VCC 27 VCC VCC 33 VCC VCC 39 VCC VCC 55 VCC VCC 4 GND GND 8 GND GND 12 GND GND 16 GND GND 20 GND ...

Page 9

... Table 3. Pin Assignments (continued) CY7C65631 CY7C65621 Pin Name Name Downstream Port 1 13 DD–[1] DD–[1] 14 DD+[1] DD+[1] 36 AMBER#[1] AMBER#[1] 35 GREEN#[1] GREEN#[1] 30 OVR#[1] OVR#[1] 29 PWR#[1] PWR#[1] Downstream Port 2 9 DD–[2] DD–[2] 10 DD+[2] DD+[2] 38 AMBER#[2] AMBER#[2] 37 ...

Page 10

Default Descriptors This section presents the different descriptors that are available. There is a table for each that lists the functionality of each descriptor. Device Descriptor The standard device descriptor for CY7C65621/31 is based on the information found in the ...

Page 11

Endpoint Descriptor Byte Full Speed High Speed 0 0x07 0x07 1 0x05 0x05 2 0x81 0x81 3 0x03 0x03 4,5 0x0001 0x0001 6 0xFF 0x0C Device Qualifier Descriptor Byte Full Speed High Speed 0 0x0A 0x0A 1 0x06 0x06 2,3 ...

Page 12

... This value is configured through the external EEPROM. Document #: 001-52934 Rev. *B Description 9 bytes Hub descriptor Number of ports supported, CY7C65631. Number of ports supported, CY7C65621. b1, b0: Logical power switching mode 00: Ganged power switching (all ports’ power at once) 01: Individual port power switching (Default in CY7C65621/31) ...

Page 13

Configuration Options Systems using CY7C65621/31 may have the option of using a fuse ROM which is preset at the factory to configure the hub. Otherwise, it must have an external EEPROM for the device to have a unique VID, PID, ...

Page 14

Byte 12: IllegalHubDescriptor, CompoundDevice, Full speedOnly, NoPortIndicators, Reserved, GangPowered, SingleTTOnly Bit 7: IllegalHubDescriptor. For GetHubDescriptor request, some USB hosts use a DescriptorTypeof 0x00 instead of HUB_DESCRIPTOR, 0x29. According to the USB 2.0 stan- dard, a hub must treat this as ...

Page 15

Byte 7: EnabledOvercurrentTimer[3:0], DisabledOvercur- rentTimer[3:0] Count time in ms for filtering overcurrent detection. Bits 7–4 are for an enabled port, and bits 3–0 are for a disabled port. Both range from ms. See section on page ...

Page 16

Byte 21: SupportedStrings This field contains a bitmap of strings supported by the hub. A set bit indicates that the standard string is supported. A bit not set indicates that the string is not supported. The hub controller returns a ...

Page 17

Supported USB Requests Device Class Commands Table 5. Device Class Requests Request bmRequestType bRequest GetDeviceStatus 10000000B GetInterfaceStatus 10000001B GetEndpointStatus 10000010B GetDeviceDescriptor 10000000B GetConfigDescriptor 10000000B GetDeviceQualifierDescriptor 10000000B GetOtherSpeedConfiguration 10000000B Descriptor [1] GetConfiguration 10000000B [1] SetCongfiguration 00000000B GetInterface 10000001B SetInterface 00000001B SetAddress ...

Page 18

Hub Class Commands Table 6. Hub Class Requests Request bmRequestType bRequest GetHubStatus 10100000B GetPortStatus 10100011B ClearHubFeature 00100000B ClearPortFeature 00100011B ClearPortFeature 00100011B SetHubFeature 00100000B SetPortFeature 00100011B SetPortFeature 00100011B SetPortFeature 00100011B GetHubDescriptor 10100000B ClearTTBuffer 00100011B ResetTT 00100000B GetTTState 10100011B StopTT 00100011B Document ...

Page 19

Table 6. Hub Class Requests (continued) Request bmRequestType bRequest Vendor Commands Read EEPROM 11000000B This request results in length bytes of data being read from the external memory device, and returned to the host. Data is read beginning with address ...

Page 20

Table 9. Port Indicator Selector for Feature Selector PORT_INDICATOR (0x22) Port Indicator Color Color set automatically as shown in Table 1 Amber Green Off Upstream USB Connection The following is a schematic of the USB upstream connector. VCC D– D+ ...

Page 21

System Block Diagram Figure 5. Sample Schematic for 4-Port Self Powered Configuration VBUS VCC 2.2 F D– D– 10V 150 k GND SHELL 3.3V 3.3V 10K SELFPWR VBUSPOWER VBUSPOWER 3.3V 100K RESET 0.1F D– D- HX2LP Lite D+ ...

Page 22

Electrical Characteristics Absolute Maximum Ratings Storage temperature ................................. –65°C to +150 °C Ambient temperature with power applied: Commercial ....................................... 0°C to +70°C Automotive ................................... –40°C to +85°C Supply voltage to ground potential ................–0.5V to +4.0V DC voltage applied to outputs ...

Page 23

... Parameter Description Clock rise/fall time Clock frequency Data setup time Hold time Reset period Ordering Information Ordering Code CY7C65621-56LTXC CY7C65621-56LTXCT CY7C65631-56LTXC CY7C65631-56LTXCT CY4606 CY4605 Document #: 001-52934 Rev. *B Conditions Min Typ 50 100 1.9 Package Type 56-pin QFN 2-Port 56-pin QFN 2-Port tape and reel ...

Page 24

Package Diagram The CY7C65621/31 is available in a space saving 56-pin QFN (8 × 8 mm). Document #: 001-52934 Rev. *B Figure 6. 56-Pin QFN (8X8X0.90 mm) CY7C65621/31 51-85187 *E Page [+] Feedback ...

Page 25

... Cypress against all charges. Any Source Code (software and/or firmware) is owned by Cypress Semiconductor Corporation (Cypress) and is protected by and subject to worldwide patent protection (United States and foreign), United States copyright laws and international treaty provisions. Cypress hereby grants to licensee a personal, non-exclusive, non-transferable license to copy, use, modify, create derivative works of, and compile the Cypress Source Code and derivative works for the sole purpose of creating custom software and or firmware in support of licensee product to be used only in conjunction with a Cypress integrated circuit as specified in the applicable agreement ...

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