EPF10K50SQC240-2N Altera, EPF10K50SQC240-2N Datasheet - Page 4

FLEX 10KE

EPF10K50SQC240-2N

Manufacturer Part Number
EPF10K50SQC240-2N
Description
FLEX 10KE
Manufacturer
Altera
Datasheet

Specifications of EPF10K50SQC240-2N

Family Name
FLEX 10KE
Number Of Usable Gates
50000
Number Of Logic Blocks/elements
2880
# I/os (max)
189
Frequency (max)
200MHz
Process Technology
CMOS
Operating Supply Voltage (typ)
2.5V
Logic Cells
2880
Ram Bits
40960
Device System Gates
199000
Operating Supply Voltage (min)
2.375V
Operating Supply Voltage (max)
2.625V
Operating Temp Range
0C to 85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
240
Package Type
PQFP
Lead Free Status / Rohs Status
Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
EPF10K50SQC240-2N
Manufacturer:
ALTERA
Quantity:
1
Part Number:
EPF10K50SQC240-2N
Manufacturer:
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FLEX 10KE Embedded Programmable Logic Devices Data Sheet
General
Description
4
Pitch (mm)
Area (mm
Length width
(mm
Table 4. FLEX 10KE Package Sizes
Device
mm)
2
)
22
TQFP
144-
0.50
484
Pin
22 30.6
208-Pin
PQFP
0.50
936
Altera FLEX 10KE devices are enhanced versions of FLEX 10K devices.
Based on reconfigurable CMOS SRAM elements, the FLEX architecture
incorporates all features necessary to implement common gate array
megafunctions. With up to 200,000 typical gates, FLEX 10KE devices
provide the density, speed, and features to integrate entire systems,
including multiple 32-bit buses, into a single device.
The ability to reconfigure FLEX 10KE devices enables 100
to shipment and allows the designer to focus on simulation and design
verification. FLEX 10KE reconfigurability eliminates inventory
management for gate array designs and generation of test vectors for fault
coverage.
Table 5
performance values were obtained with Synopsys DesignWare or LPM
functions. Special design techniques are not required to implement the
applications; the designer simply infers or instantiates a function in a
Verilog HDL, VHDL, Altera Hardware Description Language (AHDL), or
schematic design file.
30.6 34.6
shows FLEX 10KE performance for some common designs. All
240-Pin
RQFP
PQFP
1,197
0.50
34.6 17
FineLine
256-Pin
BGA
289
1.0
17 35 35 23
1,225
356-
BGA
1.27
Pin
FineLine
484-Pin
BGA
529
1.0
23 62.5
599-Pin
3,904
PGA
62.5 45 45 27
Altera Corporation
2,025
600-
BGA
1.27
Pin
testing prior
FineLine
672-Pin
BGA
729
1.0
27

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