MAX7427EUA Maxim Integrated Products, MAX7427EUA Datasheet - Page 9

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MAX7427EUA

Manufacturer Part Number
MAX7427EUA
Description
Active Filter
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of MAX7427EUA

Number Of Channels
1
Cutoff Frequency
12 KHz
Supply Voltage (max)
3.6 V
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Operating Supply Voltage
3 V
Supply Voltage (min)
2.7 V
Package / Case
uMAX-8
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Figure 2. Elliptic Filter Response
powered from 0 to V
clock adjusts the corner frequency of the filter:
When using the internal oscillator, the capacitance
(C
Since C
capacitance at CLK so that it does not affect the inter-
nal oscillator frequency. Varying the rate of the internal
oscillator adjusts the filter’s corner frequency by a
100:1 clock-to-corner frequency ratio. For example, an
internal oscillator frequency of 100kHz produces a
nominal corner frequency of 1kHz.
The MAX7426/MAX7427’s input impedance is effective-
ly that of a switched-capacitor resistor (see the following
equation), and is inversely proportional to frequency.
The input impedance values determined by the equa-
tion represent the average input impedance, since the
input current is not continuous. As a rule, use a driver
with an output resistance less than 10% of the filter’s
input impedance.
OSC
Input Impedance vs. Clock Frequencies
) on CLK determines the oscillator frequency:
OSC
PASSBAND
is in the low picofarads, minimize the stray
f
OSC
_______________________________________________________________________________________
f
(kHz)
C
DD
f
C
f
. Varying the rate of the external
C
=
=
f
TRANSITION RATIO =
S
f
100
CLK
17.5
C
f
RIPPLE
S
OSC
×
STOPBAND
(pF)
10
FREQUENCY
3
f
f
S
C
Internal Clock
5th-Order, Lowpass, Elliptic,
Switched-Capacitor Filters
Estimate the input impedance of the filter by using the
following formula:
where f
The MAX7426/MAX7427 have a shutdown mode that is
activated by driving SHDN low. In shutdown mode, the
filter supply current reduces to 0.2µA, and the output of
the filter becomes high impedance. For normal opera-
tion, drive SHDN high or connect to V
COM sets the common-mode input voltage and is
biased at midsupply with an internal resistor-divider. If
the application does not require offset adjustment, con-
nect OS to COM. For applications where offset adjust-
ment is required, apply an external bias voltage
through a resistor-divider network to OS, as shown in
Figure 3. For applications that require DC level shifting,
adjust OS with respect to COM. (Note: Do not leave OS
unconnected.) The output voltage is represented by
these equations:
where (V
OS is added at the output stage. See the Electrical
Figure 3. Offset Adjustment Circuit
0.1µF
CLOCK
INPUT
V
CLK
Offset (OS) and Common-Mode (COM)
SUPPLY
IN
- V
= clock frequency and C
V
V
OUT
COM
COM
IN
CLK
Applications Information
Z
) is lowpass filtered by the SCF and
IN
Low-Power Shutdown Mode
=
=
MAX7426
MAX7427
(
=
V
V
GND
V
DD
IN
DD
2
f
CLK
(
typical
V
SHDN
COM
1
OUT
×
COM
OS
Input Adjustment
C
IN
0.1µF
0.1µF
)
)
IN
DD
+
= 1pF.
V
OUTPUT
.
OS
50k
50k
50k
9

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