PI6C185-00QIE Pericom Semiconductor, PI6C185-00QIE Datasheet - Page 3

• Manufacturer Part Number: PI6C185-00QIE
• Description: Clock Buffer Precision 1:7 Clock Driver
• Manufacturer: Pericom Semiconductor

Specifications of PI6C185-00QIE

• Number Of Outputs: 7
• Max Input Freq: 125 MHz
• Propagation Delay (max): 5 ns
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Package / Case: QSOP-20
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2
1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2
2-Wire I
The I
output and test mode enable.
The PI6C185-00 is a slave receiver device. It can not be read back.
Sub addressing is not supported. To change one of the control
bytes, all preceding bytes must be sent.
Every bite put on the SDATA line must be 8-bits long (MSB first),
followed by an acknowledge bit generated by the receiving device.
During normal data transfers SDATA changes only when SCLK is
LOW. Exceptions: A HIGH to LOW transition on SDATA while
SCLK is HIGH indicates a “start” condition. A LOW to HIGH
transition on SDATA while SCLK is HIGH is a “stop” condition
and indicates the end of a data transfer cycle.
Maximum Ratings
(Above which the useful life may be impaired.
For user guidelines, not tested.)
Storage Temperature ......................................... –65°C to +150°C
Ambient Temperature with Power Applied ......... –40°C to +85°C
3.3V Supply Voltage to Ground Potential ............. –0.5V to +4.6V
DC Input Voltage .................................................. –0.5V to +4.6V
Note:
Stresses greater than those listed under MAXIMUM RATINGS
may cause permanent damage to the device. This is a stress rating
only and functional operation of the device at these or any other
conditions above those indicated in the operational sections of this
specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability.
Supply Current
2
S
C interface permits individual enable/disable of each clock
y
08-0298
I
I
I
I
m
D
D
D
D
D
D
D
D
b
2
l o
C Control
(V
DD
= +3.465V, C
S
S
S
S
u
u
u
u
P
p p
p p
p p
p p
a
a r
y l
y l
y l
y l
m
C
C
C
C
t e
r u
r u
r u
r u
r e
e r
e r
e r
e r
LOAD
t n
t n
t n
t n
= Max.)
B
B
B
B
U
U
U
U
F
F
F
F
_
_
_
_
N I
N I
N I
N I
e T
=
=
=
=
t s
0
6
1
1
. 6
0 0
3 3
C
M
6 6
o
0 .
3 .
H
n
3
z
d
M
M
M
t i
Each data transfer is initiated with a start condition and ended with
a stop condition. The first byte after a start condition is always a
7-bit address byte followed by a read/write bit. (HIGH = read from
addressed device, LOW = write to addressed device). If the
device’s own address is detected, PI6C185-00 generates an
acknowledge by pulling SDATA line LOW during ninth clock
pulse, then accepts the following data bytes until another start or
stop condition is detected.
Following acknowledgement of the address byte (0D2H), two
more bytes must be sent:
1. “Command Code” byte, and
2. “Byte Count” byte.
Although the data bits on these two bytes are “don’t care,” they
must be sent and acknowledged.
H
H
H
o i
z
z
z
n
M
. n i
Precision 1-7 Clock Buffer
T
2
1
5 8
y
0 2
0 3
. p
M
3
a
. x
PS8317F
PI6C185-00
U
m
n
A
s t i
11/13/08