DS2174QN Maxim Integrated Products, DS2174QN Datasheet - Page 17

• Manufacturer Part Number: DS2174QN
• Description: Communication ICs - Various
• Manufacturer: Maxim Integrated Products
• Type: Bit Error Rate Testerr

Specifications of DS2174QN

• Mounting Style: SMD/SMT
• Operating Supply Voltage: 3.3 V
• Supply Type: Analog
• Package / Case: PLCC-44
• Data Rate: 622 Mbps
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 3 V
• Supply Current: 50 mA
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

3.4 Test Register
Test register used for factory test. All bits must be set to 0 for proper operation.
Test Register (Address = 9h)
3.5 Count Registers
Note: Bit 2 of Control Register 4 determines if the addresses point to the bit count or error count registers.
The bit count registers comprise a 48-bit count of bits (actually RCLK cycles) received at RDAT. C47 is
the MSB of the 48-bit count. The bit counter increments for each cycle of RCLK when RCLK_EN is
high. The bit counter is enabled regardless of synchronization. The status register bit BCOF is set when
this 48-bit register overflows. The counter rolls over upon an overflow condition. The DS2174 latches the
bit count into the bit count registers and clears the internal bit count when the LC bit in Control Register 1
is toggled from low to high.
The error count registers comprise a 48-bit count of bits received in error at RDAT. The bit error counter
is disabled during loss-of-sync. C47 is the MSB of the 48-bit count. The status register bit BECOF is set
when this 48-bit register overflows. The counter rolls over upon an overflow condition. The DS2174
latches the bit count into the bit error count registers and clears the internal bit error count when the LC
bit in Control Register 1 is toggled from low to high.
The bit count and bit error count registers are used by an external processor to compute the BER
performance on a loop or channel basis.
Count Registers (Address = Ah–Fh)
(MSB)
(MSB)
TEST
C15
C23
C31
C39
C47
C7
SYMBOL
TEST
TEST
TEST
TEST
TEST
TEST
TEST
TEST
TEST
C14
C22
C30
C38
C46
C6
Factory Use. Must be set to 0 for proper operation.
Factory Use. Must be set to 0 for proper operation.
Factory Use. Must be set to 0 for proper operation.
Factory Use. Must be set to 0 for proper operation.
Factory Use. Must be set to 0 for proper operation.
Factory Use. Must be set to 0 for proper operation.
Factory Use. Must be set to 0 for proper operation.
Factory Use. Must be set to 0 for proper operation.
TEST
C13
C21
C29
C37
C45
C5
TEST
C12
C20
C28
C36
C44
C4
TEST
C11
C19
C27
C35
C43
C3
FUNCTION
17 of 24
TEST
C10
C18
C26
C34
C42
C2
TEST
C17
C25
C33
C41
C1
C9
(LSB)
(LSB)
TEST
C16
C24
C32
C40
C0
C8