LAN9218I-MT SMSC, LAN9218I-MT Datasheet - Page 57

• Manufacturer Part Number: LAN9218I-MT
• Description: Ethernet ICs Indust Hi Perfrm Single-Chip
• Manufacturer: SMSC
• Type: Single Chip MAC and PHY Controllerr

Specifications of LAN9218I-MT

• Ethernet Connection Type: 10 Base-T, 100 Base-TX
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Product: Ethernet Controllers
• Number Of Transceivers: 1
• Standard Supported: 802.3, 802.3u
• Data Rate: 10 Mbps, 100 Mbps
• Supply Voltage (max): 3.3 V
• Supply Voltage (min): 0 V
• Supply Current (max): 69 mA
• Maximum Operating Temperature: + 85 C
• Package / Case: TQFP-100
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

High-Performance Single-Chip 10/100 Ethernet Controller with HP Auto-MDIX and Industrial Temperature Support
Datasheet
SMSC LAN9218i
GROUP
CODE
01001
10100
10101
01010
01011
10010
10011
10110
11010
11000
10001
01101
00100
00110
11001
00000
00001
00010
00011
00101
11110
01110
01111
10111
11011
11100
11101
00111
11111
SYM
C
D
R
H
0
1
2
3
4
5
6
7
8
9
A
B
E
F
K
T
V
V
V
V
V
V
V
J
I
IDLE
First nibble of SSD, translated to “0101”
following IDLE, else RX_ER
Second nibble of SSD, translated to
“0101” following J, else RX_ER
First nibble of ESD, causes de-assertion
of CRS if followed by /R/, else assertion
of RX_ER
Second nibble of ESD, causes
deassertion of CRS if following /T/, else
assertion of RX_ER
Transmit Error Symbol
INVALID, RX_ER if during RX_DV
INVALID, RX_ER if during RX_DV
INVALID, RX_ER if during RX_DV
INVALID, RX_ER if during RX_DV
INVALID, RX_ER if during RX_DV
INVALID, RX_ER if during RX_DV
INVALID, RX_ER if during RX_DV
A
B
C
D
E
0
1
2
3
4
5
6
7
8
9
F
INTERPRETATION
Table 4.1 4B/5B Code Table
RECEIVER
0000
0001
0010
0011
0100
0101
0110
1000
1001
1010
1011
1100
1101
0111
1110
1111
DATASHEET
57
DATA
Sent after /T/R until TX_EN
Sent for rising TX_EN
Sent for rising TX_EN
Sent for falling TX_EN
Sent for falling TX_EN
Sent for rising TX_ER
INVALID
INVALID
INVALID
INVALID
INVALID
INVALID
INVALID
A
B
C
D
E
0
1
2
3
4
5
6
7
8
9
F
INTERPRETATION
TRANSMITTER
0000
0001
0010
0011
0100
0101
0110
1000
1001
1010
1011
1100
1101
0111
1110
1111
Revision 2.7 (03-15-10)
DATA