LAN9500I-ABZJ-TR SMSC, LAN9500I-ABZJ-TR Datasheet - Page 30

• Manufacturer Part Number: LAN9500I-ABZJ-TR
• Description: Ethernet ICs USB 2.0 to 10/100 Ethernet CTRL TR
• Manufacturer: SMSC

Specifications of LAN9500I-ABZJ-TR

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Revision 1.0 (05-17-10)
5.3
5.4
5.4.1
0090h - 00FFh
OFFSET
EEPROM Auto-Load
Examples of EEPROM Format Interpretation
0000h
0008h
0010h
0018h
0020h
0028h
0030h
0038h
0040h
0048h
0050h
0058h
0060h
0068h
0070h
0078h
0080h
0088h
BYTE
Certain system level resets (USB reset, POR, nRESET, and SRST) cause the EEPROM contents to
be loaded into the device. After a reset, the EEPROM controller attempts to read the first byte of data
from the EEPROM. If the value 0xA5 is read from the first address, then the EEPROM controller will
assume that an external Serial EEPROM is present.
Note: The USB reset only loads the MAC address.
LAN9500/LAN9500i
Table 5.5
case of LAN9500/LAN9500i.
Table 5.6
and
illustrates, byte by byte, how the EEPROM is formatted.
Table 5.5 Dump of EEPROM Memory - LAN9500/LAN9500i
Table 5.6
provide an example of how the contents of a EEPROM are formatted in the
Table 5.5
DATASHEET
is a dump of the EEPROM memory (256-byte EEPROM), while
30
..............................................
A5 12 34 56 78 9A BC 01
12 2D 12 36 12 3F 0A 03
10 03 4C 00 41 00 4E 00
00 A0 FA 09 04 00 00 03
FF 00 FF 00 12 01 00 02
27 00 01 01 00 A0 FA 09
04 00 00 03 FF 00 FF 00
04 04 09 04 0A 0F 10 14
10 1C 00 00 00 00 12 24
53 00 4D 00 53 00 43 00
12 01 00 02 FF 00 01 40
FF 00 01 40 24 04 00 95
39 00 35 00 30 00 30 00
10 03 30 00 30 00 30 00
35 00 31 00 32 00 33 00
24 04 00 95 00 01 01 02
03 01 09 02 27 00 01 01
00 01 01 02 03 01 09 02
VALUE
USB 2.0 to 10/100 Ethernet Controller
SMSC LAN950x Family
Datasheet