HUF75545S3ST Fairchild Semiconductor, HUF75545S3ST Datasheet
HUF75545S3ST
Specifications of HUF75545S3ST
HUF75545S3STTR
Related parts for HUF75545S3ST
HUF75545S3ST Summary of contents
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... Peak Current vs Pulse Width Curve • UIS Rating Curve Ordering Information PART NUMBER HUF75545P3 HUF75545S3 HUF75545S3S NOTE: When ordering, use the entire part number. Add the suffix T to obtain the TO-263AB variant in tape and reel, e.g., HUF75545S3ST Unless Otherwise Specified September 2002 = 0.010 10V V ...
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... Gate to Drain “Miller” Charge CAPACITANCE SPECIFICATIONS Input Capacitance Output Capacitance Reverse Transfer Capacitance Source to Drain Diode Specifications PARAMETER Source to Drain Diode Voltage Reverse Recovery Time Reverse Recovered Charge ©2002 Fairchild Semiconductor Corporation Unless Otherwise Specified SYMBOL TEST CONDITIONS 250 (Figure 11) ...
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... SINGLE PULSE 0. FIGURE 3. NORMALIZED MAXIMUM TRANSIENT THERMAL IMPEDANCE 2000 1000 V = 10V GS 100 TRANSCONDUCTANCE MAY LIMIT CURRENT IN THIS REGION ©2002 Fairchild Semiconductor Corporation 150 175 25 125 o C) FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT RECTANGULAR PULSE DURATION ( PULSE WIDTH (s) FIGURE 4. PEAK CURRENT CAPABILITY ...
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... PULSE DURATION = DUTY CYCLE = 0.5% MAX 2.0 1.5 1.0 0.5 -80 - JUNCTION TEMPERATURE ( J FIGURE 9. NORMALIZED DRAIN TO SOURCE ON RESISTANCE vs JUNCTION TEMPERATURE ©2002 Fairchild Semiconductor Corporation (Continued) 100 s 1ms 10ms o C 100 200 NOTE: Refer to Fairchild Application Notes AN9321 and AN9322. FIGURE 6. UNCLAMPED INDUCTIVE SWITCHING - ...
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... I = 250 A D 1.1 1.0 0.9 0.8 -80 - JUNCTION TEMPERATURE ( J FIGURE 11. NORMALIZED DRAIN TO SOURCE BREAKDOWN VOLTAGE vs JUNCTION TEMPERATURE FIGURE 13. GATE CHARGE WAVEFORMS FOR CONSTANT GATE CURRENT ©2002 Fairchild Semiconductor Corporation (Continued) 80 120 160 200 o C) FIGURE 12. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE 40V WAVEFORMS IN 2 DESCENDING ORDER: ...
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... Test Circuits and Waveforms VARY t TO OBTAIN P R REQUIRED PEAK FIGURE 14. UNCLAMPED ENERGY TEST CIRCUIT g(REF) FIGURE 16. GATE CHARGE TEST CIRCUIT FIGURE 18. SWITCHING TIME TEST CIRCUIT ©2002 Fairchild Semiconductor Corporation DUT 0. DUT g(REF DUT DSS FIGURE 15. UNCLAMPED ENERGY WAVEFORMS Q g(TOT) ...
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... S2BMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = 0.5 VOFF= -1.5) .ENDS NOTE: For further discussion of the PSPICE model, consult A New PSPICE Sub-Circuit for the Power MOSFET Featuring Global Temperature Options; IEEE Power Electronics Specialist Conference Records, 1991, written by William J. Hepp and C. Frank Wheatley. ©2002 Fairchild Semiconductor Corporation DPLCAP 10 RSLC2 ...
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... Fairchild Semiconductor Corporation DPLCAP 10 RSLC2 - 6 ESG 8 EVTHRES + ...
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... Fairchild Semiconductor Corporation JUNCTION th RTHERM1 CTHERM1 6 RTHERM2 CTHERM2 5 RTHERM3 CTHERM3 4 RTHERM4 CTHERM4 3 RTHERM5 ...
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... TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended exhaustive list of all such trademarks. ACEx™ FACT™ ActiveArray™ FACT Quiet Series™ ® Bottomless™ FAST CoolFET™ FASTr™ CROSSVOLT™ ...