ZL30106QDG Zarlink, ZL30106QDG Datasheet - Page 43

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ZL30106QDG

Manufacturer Part Number
ZL30106QDG
Description
SONET/SDH/PDH Network Interface 64-Pin TQFP
Manufacturer
Zarlink
Datasheet

Specifications of ZL30106QDG

Package
64TQFP
Power Supply Type
Analog
Typical Supply Current
68(Max) mA
Typical Operating Supply Voltage
1.8|3.3 V
Minimum Operating Supply Voltage
1.62 V
Maximum Operating Supply Voltage
3.63 V

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ZL30106QDG
Manufacturer:
ZARLINK
Quantity:
600
Part Number:
ZL30106QDG1
Manufacturer:
ZARLINK
Quantity:
600
Company:
Part Number:
ZL30106QDG1
Quantity:
120
AC Electrical Characteristics* - OSCi 20 MHz Master Clock Input
* Supply voltage and operating temperature are as per Recommended Operating Conditions.
7.2
Performance Characteristics* - Functional
10
1
2
3
4
5
6
1
2
3
4
5
6
7
8
9
Reference Out of Range Threshold
Performance Characteristics
Oscillator Tolerance - DS1/E1
Oscillator Tolerance - Derived DS1
Oscillator Tolerance - DS2/DS3/E2/E3
Duty cycle
Rise time
Fall time
Holdover accuracy
Holdover stability
Freerun accuracy
Capture Range
DS1/E1 (APP_SEL=00)
Derived DS1 (APP_SEL=01)
DS2/DS3/E2/E3 (APP_SEL=10),
SONET/SDH (APP_SEL=11)
All Application modes, 2 kHz reference
(14 Hz filter)
DS1/E1 (APP_SEL=00) 8 kHz and
greater reference frequencies (29 Hz
filter)
Derived DS1 (APP_SEL=01) 8 kHz and
greater reference frequencies (29 Hz
filter)
(including hysteresis)
Lock Time
Characteristics
Characteristics
SONET/SDH
Zarlink Semiconductor Inc.
ZL30106
Min.
Min.
-130
-4.6
-9.2
-32
-20
-64
-83
-12
-40
-52
1.5
40
1
1
43
Max.
+130
Max.
+4.6
+9.2
0.01
+32
+20
+64
+83
+12
+40
+52
1.5
60
10
10
0
0
1
1
Units
Units
ppm
ppm
ppm
ppm
ppm
ppm
ppm
ppm
ppm
ppm
ns
ns
%
s
s
s
Determined by stability of the
20 MHz master clock oscillator
Determined by accuracy of the
20 MHz master clock oscillator
The 20 MHz master clock oscillator
set at 0 ppm
The 20 MHz master clock oscillator
set at 0 ppm
The 20 MHz master clock oscillator
set at 0 ppm
The 20 MHz master clock oscillator
set at 0 ppm
±9.2 to ±64 ppm frequency offset,
HMS=1, TIE_CLR=1 and
BW_SEL=0
±64 ppm frequency offset, HMS=1,
TIE_CLR=1 and BW_SEL=0.
±9.2 ppm frequency offset,
HMS=1, TIE_CLR=1 and
BW_SEL=0
Notes
Notes
Data Sheet

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