AD7249BR Analog Devices Inc, AD7249BR Datasheet - Page 6

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AD7249BR

Manufacturer Part Number
AD7249BR
Description
DAC 2-CH R-2R 12-Bit 16-Pin SOIC W
Manufacturer
Analog Devices Inc
Series
DACPORT®r
Datasheet

Specifications of AD7249BR

Package
16SOIC W
Resolution
12 Bit
Conversion Rate
125 KSPS
Architecture
R-2R
Digital Interface Type
Serial (3-Wire)
Number Of Outputs Per Chip
2
Output Type
Voltage
Full Scale Error
±6 LSB
Integral Nonlinearity Error
±0.5 LSB
Maximum Settling Time
10 us
Rohs Status
RoHS non-compliant
Settling Time
10µs
Number Of Bits
12
Data Interface
Serial
Number Of Converters
2
Voltage Supply Source
Dual ±
Power Dissipation (max)
300mW
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
16-SOIC (0.300", 7.5mm Width)
Lead Free Status / RoHS Status

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AD7249
Internal Reference
The AD7249 has an on-chip temperature compensated buried
Zener reference which is factory trimmed to 5 V ± 50 mV. The
reference voltage is provided at the REFOUT pin. This refer-
ence can be used to provide the reference voltage for the D/A
converter by connecting the REFOUT pin to the REFIN pin.
The reference voltage can also be used as a reference for other
components and is capable of providing up to 500 µA to an
external load. The maximum recommended capacitance on
REFOUT for normal operation is 50 pF. If the reference output
is required to drive a capacitive load greater than 50 pF, then a
200 Ω resistor should be placed in series with the capacitive
load. Figure 3 shows the suggested REF OUT decoupling
scheme, a 200 Ω resistor and the parallel combination of a
10 µF tantalum and a 0.1 µF ceramic capacitor. This decoupling
scheme reduces the noise spectral density of the reference.
External Reference
In some applications, the user may require a system reference or
some other external reference to drive the AD7249. References
such as the AD586 provide an ideal external reference source
(See Figure 10). The REFIN voltage is internally buffered by a
unity gain amplifier before being applied to the D/A converter.
The D/A converter is scaled for a 5 V reference and the device is
tested with 5 V applied to REFIN. Other reference voltages may
be used with degraded performance. Figure 4 shows the degra-
dation in linearity vs. REFIN.
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0.0
REFOUT
2
3
200
10 F
4
REFIN – Volts
5
0.1 F
DNL
INL
6
7
V
V
T
DD
SS
A
EXT LOAD
= +25 C
= –15V
= +15V
8
9
Op Amp Section
The output of the voltage-mode D/A converter is buffered by a
noninverting CMOS amplifier. The R
output voltage ranges to be selected. The buffer amplifier is
capable of developing +10 V across a 2 kΩ load to AGND.
The output amplifier can be operated from a single +15 V sup-
ply by tying V
The amplifier can also be operated from dual supplies to allow
an additional bipolar output range of –5 V to +5 V. Dual sup-
plies are necessary for the bipolar output range but can also be
used for the unipolar ranges to give faster settling time to volt-
ages near 0 V, to allow full sink capability of 2.5 mA over the
entire output range and to eliminate the effects of negative offsets
on the transfer characteristic (outlined previously). A plot of the
output sink capability of the amplifier is shown in Figure 5.
500
200
100
50
20
3
2
1
0
0
50
0
100
SS
*
REFERENCE DECOUPLING COMPONENTS ARE
A 200
COMBINATION OF 10 F AND 0.1 F TO GND.
= 0 V.
V
SS
200
2
= –15V
RESISTOR IN SERIES WITH A PARALLEL
500 1k
OUTPUT VOLTAGE – Volts
FREQUENCY – Hz
4
V
SS
2k
= 0V
5k
6
OFS
REFERENCE
(NO DECOUPLING)
OUTPUT WITH ALL
0s ON DAC
REFERENCE
(DECOUPLED*)
10k
input allows three
20k
V
V
T
8
A
DD
SS
= +25 C
= 0V
= +15V
50k
100k
10

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