74LVC244APW NXP Semiconductors, 74LVC244APW Datasheet - Page 8

• Manufacturer Part Number: 74LVC244APW
• Description: Buffer/Line Driver 8-CH Non-Inverting 3-ST CMOS 20-Pin TSSOP Tube
• Manufacturer: NXP Semiconductors

Specifications of 74LVC244APW

• Package: 20TSSOP
• Logic Family: LVC
• Logic Function: Buffer/Line Driver
• Number Of Outputs Per Chip: 8
• Output Type: 3-State
• Input Signal Type: Single-Ended
• Maximum Propagation Delay Time @ Maximum Cl: 2.8(Typ)@3.3V ns
• Tolerant I/os: 5 V
• Typical Quiescent Current: 0.1 uA
• Polarity: Non-Inverting

NXP Semiconductors
Table 7.
Voltages are referenced to GND (ground = 0 V). For test circuit see
[1]
[2]
[3]
[4]
[5]
11. AC waveforms
74LVC_LVCH244A_6
Product data sheet
Symbol Parameter
C
Fig 6.
PD
t
t
t
Typical values are measured at T
Typical values are measured at T
Skew between any two outputs of the same package switching in the same direction. This parameter is guaranteed by design.
C
P
f
C
V
N = number of inputs switching
pd
en
dis
i
(C
D
CC
PD
= input frequency in MHz; f
L
is the same as t
is the same as t
= output load capacitance in pF
is the same as t
= C
L
is used to determine the dynamic power dissipation (P
= supply voltage in Volts
power
dissipation
capacitance
Measurement points are given in
Logic levels: V
The input (nAn) to output (nYn) propagation delays
PD
V
Dynamic characteristics
CC
2
V
CC
f
o
2
) = sum of the outputs.
PLH
PZL
f
PLZ
i
OL
and t
N + (C
and t
and t
and V
Conditions
per buffer; V
PZH
PHL
PHZ
o
OH
= output frequency in MHz
L
.
.
.
amb
amb
are typical output voltage levels that occur with the output load.
V
CC
nYn output
= 25 C.
= 25 C and V
nAn input
2
…continued
I
= GND to V
Table
f
o
) where:
GND
V
V
8.
OH
OL
V
I
Rev. 06 — 13 August 2009
CC
t
PLH
CC
= 3.3 V.
; V
CC
D
V
in W).
M
= 3.3 V
V
M
74LVC244A; 74LVCH244A
Figure
[5]
Min
8.
-
V
40 C to +85 C
M
V
M
t
Typ
PHL
mna171
10
[2]
Octal buffer/line driver; 3-state
Max
-
40 C to +125 C Unit
Min
-
© NXP B.V. 2009. All rights reserved.
Max
-
8 of 18
pF