8305AGILF Integrated Device Technology (Idt), 8305AGILF Datasheet - Page 12

• Manufacturer Part Number: 8305AGILF
• Description: Clock Driver 2-IN LVCMOS/LVTTL 16-Pin TSSOP Tube
• Manufacturer: Integrated Device Technology (Idt)

Specifications of 8305AGILF

• Package: 16TSSOP
• Configuration: 1 x 2:1
• Input Signal Type: HCSL/LVCMOS/LVDS/LVHSTL/LVPECL/LVTTL/SSTL
• Maximum Output Frequency: 350 MHz
• Operating Supply Voltage: 3.3 V

S
This application note provides general design guide using
ICS8305I LVCMOS buffer. Figure 4 shows a schematic example
of the ICS8305I LVCMOS clock buffer. In this example, the input
8305AGI
T
T
The transistor count for ICS8305I is: 459
ABLE
RANSISTOR
CHEMATIC
VDD
6.
Single-Layer PCB, JEDEC Standard Test Boards
Multi-Layer PCB, JEDEC Standard Test Boards
NOTE: Most modern PCB designs use multi-layered boards. The data in the second row pertains to most designs.
3,.3V LVCMOS
JA
Ro ~ 7 Ohm
C
E
VS
OUNT
XAMPLE
. A
R3
IR
VDD
F
F
LOW
R4
1K
43
IGURE
T
Zo = 50
ABLE FOR
1K
R5
4. E
XAMPLE
16 L
JA
R
R6
1K
by Velocity (Linear Feet per Minute)
ELIABILITY
EAD
ICS8305I LVCMOS C
VDD
1
2
3
4
5
6
7
8
U1
TSSOP
GND
OE
VDD
CLK_EN
CLK
nCLK
CLK_SEL
LVCMOS_CLK
ICS8305
VDD=3.3V
LVCMOS-
www.idt.com
L
OW
12
I
NFORMATION
is driven by an LVCMOS driver. CLK_EN is set at logic low to
select LVCMOS_CLK input.
VDDO
VDDO
S
GND
GND
137.1°C/W
Q0
Q1
Q2
Q3
89.0°C/W
KEW
LOCK
0
16
15
14
13
12
11
10
9
TO
(U1,3)
, 1-
O
-LVCMOS/LVTTL F
C1
0.1u
VDD
UTPUT
TO
(U1,11)
-4, M
C2
0.1u
B
118.2°C/W
UFFER
81.8°C/W
200
(U1,15)
R1
43
R2
43
ULTIPLEXED
C3
0.1u
S
CHEMATIC
Zo = 50
Zo = 50
106.8°C/W
78.1°C/W
ANOUT
500
ICS8305I
D
IFFERENTIAL
LVCMOS Receiv er
LVCMOS Receiv er
REV. B JULY 29, 2010
B
UFFER
/