CY37064P100-125AXI Cypress Semiconductor Corp, CY37064P100-125AXI Datasheet - Page 16

• Manufacturer Part Number: CY37064P100-125AXI
• Description: CPLD Ultra37000™ Family 2K Gates 64 Macro Cells 125MHz CMOS Technology 5V 100-Pin TQFP
• Manufacturer: Cypress Semiconductor Corp
• Series: Ultra37000™r

Specifications of CY37064P100-125AXI

• Package: 100TQFP
• Family Name: Ultra37000™
• Device System Gates: 2000
• Number Of Macro Cells: 64
• Maximum Propagation Delay Time: 10 ns
• Number Of User I/os: 69
• Number Of Logic Blocks/elements: 4
• Typical Operating Supply Voltage: 5 V
• Maximum Operating Frequency: 125 MHz
• Number Of Product Terms Per Macro: 16
• Operating Temperature: -40 to 85 °C
• Programmable Type: In-System Reprogrammable™ (ISR™) Flash
• Delay Time Tpd(1) Max: 10.0ns
• Voltage Supply - Internal: 4.5 V ~ 5.5 V
• Number Of Macrocells: 64
• Number Of I /o: 69
• Mounting Type: Surface Mount
• Package / Case: 100-LQFP
• Voltage: 5V
• Memory Type: CMOS
• # Macrocells: 64
• Number Of Usable Gates: 2000
• Frequency (max): 125MHz
• Propagation Delay Time: 10ns
• # I/os (max): 69
• Operating Supply Voltage (typ): 5V
• In System Programmable: Yes
• Operating Supply Voltage (min): 4.5V
• Operating Supply Voltage (max): 5.5V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 100
• Package Type: TQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Number Of Logic Elements/cells: -
• Lead Free Status / Rohs Status: Compliant
• Other names: 428-1936; CY37064P100-125AXI

Document #: 38-03007 Rev. *E
Inductance
Capacitance
Endurance Characteristics
AC Characteristics
5.0V AC Test Loads and Waveforms
3.3V AC Test Loads and Waveforms
L
OUTPUT
OUTPUT
Parameter Description
C
C
C
N
Equivalent to:
Equivalent to:
I/O
CLK
DP
Parameter
INCLUDING
JIG AND
SCOPE
INCLUDING
JIG AND
SCOPE
3.3V
5V
Parameter
OUTPUT
OUTPUT
35 pF
35 pF
Maximum Pin
Inductance
[5]
[5]
(a)
(a)
THÉVENIN EQUIVALENT
THÉVENIN EQUIVALENT
Minimum Reprogramming Cycles
238Ω (COM'L)
319Ω (MIL)
295Ω (COM'L)
393Ω (MIL)
5 OR 35 pF
5 OR 35 pF
158Ω (COM’L)
270Ω (MIL)
Input/Output Capacitance
Clock Signal Capacitance
Dual Functional Pins
99Ω (COM'L)
136Ω (MIL)
V
at f = 1 MHz
IN
170Ω (COM'L)
236Ω (MIL)
340Ω (COM'L)
453Ω (MIL)
Test Conditions
Description
= 3.3V
Description
[5]
2.08V (COM'L)
2.13V (MIL)
1.77V (COM'L)
1.77V (MIL)
OUTPUT
OUTPUT
[9]
INCLUDING
JIG AND
SCOPE
3.3V
INCLUDING
JIG AND
SCOPE
5V
TQFP
Lead
44-
2
5 pF
5 pF
Normal Programming Conditions
V
V
V
PLCC
IN
IN
IN
(b)
(b)
Lead
44-
5
= 3.3V at f = 1 MHz at T
= 3.3V at f = 1 MHz at T
= 3.3V at f = 1 MHz at T
238Ω (COM'L)
319Ω (MIL)
295Ω (COM'L)
393Ω (MIL)
Test Conditions
CLCC
Test Conditions
Lead
44-
2
170Ω (COM'L)
236Ω (MIL)
340Ω (COM'L)
453Ω (MIL)
PLCC
Lead
84-
8
GND
3.0V
GND
3.0V
A
A
A
Ultra37000 CPLD Family
CLCC
= 25°C
= 25°C
= 25°C
Lead
<2 ns
<2 ns
84-
5
[2]
TQFP
Lead
100-
1,000
ALL INPUT PULSES
ALL INPUT PULSES
Min.
10%
8
10%
90%
90%
Max.
12
16
8
TQFP
Lead
160-
10,000
(c)
9
Typ.
(c)
Page 16 of 64
PQFP Unit
Lead
208-
11
90%
90%
Unit
Cycles
pF
pF
pF
10%
10%
Unit
<2 ns
<2 ns
nH