XC2S50E-6FT256I Xilinx Inc, XC2S50E-6FT256I Datasheet - Page 41

• Manufacturer Part Number: XC2S50E-6FT256I
• Description: FPGA Spartan®-IIE Family 50K Gates 1728 Cells 357MHz 0.15um Technology 1.8V 256-Pin FTBGA
• Manufacturer: Xilinx Inc

Specifications of XC2S50E-6FT256I

• Package: 256FTBGA
• Family Name: Spartan®-IIE
• Device Logic Cells: 1728
• Device Logic Units: 384
• Device System Gates: 50000
• Maximum Internal Frequency: 357 MHz
• Typical Operating Supply Voltage: 1.8 V
• Maximum Number Of User I/os: 182
• Ram Bits: 32768

Calculation of T
Capacitance
T
to the pad. The values for T
capacitive load (C
table
For other capacitive loads, use the formulas below to calcu-
late an adjusted propagation delay, T
Where:
Delay Measurement Methodology
Notes:
1.
2.
3.
4.
DS077-3 (v2.3) June 18, 2008
Product Specification
LVTTL
LVCMOS2
PCI33_3
PCI66_3
GTL
GTL+
HSTL Class I
HSTL Class III V
HSTL Class IV V
SSTL3 I and II V
SSTL2 I and II V
CTT
AGP
LVDS
LVPECL
IOOP
Standard
Adj
C
F
Input waveform switches between V
Measurements are made at V
Minimum. Worst-case values are reported.
I/O parameter measurements are made with the capacitance
values shown in the following table,
TIOOP. Refer to Application Note
terminations.
I/O standard measurements are reflected in the IBIS model
information except where the IBIS format precludes it.
Constants for Calculating
L
LOAD
is the propagation delay from the O Input of the IOB
T
IOOP1
R
is selected from
for Different
to the I/O standard used
is the capacitive load for the design
is the capacitance scaling factor
= T
(0.2xV
1.2 – 0.125 1.2 + 0.125
V
V
V
V
REF
1.6 – 0.3
SL
REF
REF
REF
REF
REF
REF
REF
IOOP
V
V
IOOP
) for each I/O standard as listed in the
REF
L
0
0
– 0.75 V
(1)
– 0.2
– 0.2
– 0.5
– 0.5
– 0.5
– 1.0
– 0.2
CCO
+ Adj + (C
Standards(1),
–
Per PCI Spec
Per PCI Spec
as a Function of
)
IOOP
IOB Output Delay Adjustments
(0.2xV
V
V
V
V
V
V
V
REF
TIOOP, below.
REF
1.6 + 0.3
REF
REF
REF
REF
REF
REF
REF
V
are based on the standard
V
REF
2.5
LOAD
H
Typ, Maximum, and
XAPP179
3
+ 0.75 V
+ 0.2
+ 0.2
+ 0.5
+ 0.5
+ 0.5
+ 1.0
+ 0.2
Constants for Calculating
(1)
L
CCO
IOOP1
and V
+
page
– C
)
.
Meas.
H
SL
Point
1.125
V
V
V
V
V
V
V
V
for appropriate
.
40, according
1.4
1.2
1.6
REF
REF
REF
REF
REF
REF
REF
REF
REF
) * F
L
Per AGP
Typ
V
0.80
0.75
0.90
0.90
1.25
Spec
1.0
1.5
1.5
REF
-
-
-
-
www.xilinx.com
(2)
Spartan-IIE FPGA Family: DC and Switching Characteristics
Constants for Calculating T
Notes:
1.
2.
LVTTL Fast Slew Rate, 2 mA drive
LVTTL Fast Slew Rate, 4 mA drive
LVTTL Fast Slew Rate, 6 mA drive
LVTTL Fast Slew Rate, 8 mA drive
LVTTL Fast Slew Rate, 12 mA drive
LVTTL Fast Slew Rate, 16 mA drive
LVTTL Fast Slew Rate, 24 mA drive
LVTTL Slow Slew Rate, 2 mA drive
LVTTL Slow Slew Rate, 4 mA drive
LVTTL Slow Slew Rate, 6 mA drive
LVTTL Slow Slew Rate, 8 mA drive
LVTTL Slow Slew Rate, 12 mA drive
LVTTL Slow Slew Rate, 16 mA drive
LVTTL Slow Slew Rate, 24 mA drive
LVCMOS2
LVCMOS18
PCI 33 MHz 3.3V
PCI 66 MHz 3.3V
GTL
GTL+
HSTL Class I
HSTL Class III
HSTL Class IV
SSTL2 Class I
SSTL2 Class II
SSTL3 Class I
SSTL3 Class II
CTT
AGP
I/O parameter measurements are made with the capacitance
values shown above. Refer to Application Note
appropriate terminations.
I/O standard measurements are reflected in the IBIS model
information except where the IBIS format precludes it.
Standard
IOOP
C
(pF)
SL
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
10
10
20
20
20
30
30
30
30
20
10
0
0
(1)
XAPP179
0.41
0.20
0.13
0.079
0.044
0.043
0.033
0.41
0.20
0.100
0.086
0.058
0.050
0.048
0.041
0.050
0.050
0.033
0.014
0.017
0.022
0.016
0.014
0.028
0.016
0.029
0.016
0.035
0.037
(ns/pF)
F
L
for
41