ISP1508AET NXP Semiconductors, ISP1508AET Datasheet - Page 54

• Manufacturer Part Number: ISP1508AET
• Description: RF Transceiver USB 2.0 ULPI TRNSCVR
• Manufacturer: NXP Semiconductors

Specifications of ISP1508AET

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 935283548118 ISP1508AET-T

NXP Semiconductors
Table 33.
Table 34.
ISP1508A_ISP1508B_1
Product data sheet
Bit
Symbol
Reset
Access
Bit
7
6
5
4
3
2
1
0
Symbol
USE_EXT_
VBUS_IND
DRV_VBUS_EXT
-
CHRG_VBUS
DISCHRG_VBUS
DM_PULLDOWN
DP_PULLDOWN
ID_PULLUP
OTG Control register (address R = 0Ah to 0Ch, W = 0Ah, S = 0Bh, C = 0Ch) bit allocation
OTG Control register (address R = 0Ah to 0Ch, W = 0Ah, S = 0Bh, C = 0Ch) bit description
USE_EXT_
VBUS_IND
R/W/S/C
11.5 USB Interrupt Enable Rising register
7
0
The bits in this register enable interrupts and RXCMDs to be sent when the corresponding
bits in the USB Interrupt Status register change from logic 0 to logic 1. By default, all
transitions are enabled.
VBUS_EXT
Description
Use External V
0b — Use the internal OTG comparator.
1b — Use the external V
Drive V
0b — PSW_N is HIGH.
1b — PSW_N to LOW.
reserved
Charge V
must first check that V
DM data lines have been LOW (SE0) for 2 ms.
0b — Do not charge V
1b — Charge V
Discharge V
for an RXCMD indicating that SESS_END has changed from 0 to 1, and then resets this bit to
0 to stop the discharge.
0b — Do not discharge V
1b — Discharge V
DM Pull Down: Enables the 15 k pull-down resistor on DM.
0b — Pull-down resistor is not connected to DM.
1b — Pull-down resistor is connected to DM.
DP Pull Down: Enables the 15 k pull-down resistor on DP.
0b — Pull-down resistor is not connected to DP.
1b — Pull-down resistor is connected to DP.
ID Pull Up: Connects a pull-up to the ID line and enables sampling of the ID level. Disabling
the ID line sampler will reduce the PHY power consumption.
0b — Disable sampling of the ID line.
1b — Enable sampling of the ID line.
R/W/S/C
DRV_
6
0
BUS
BUS
External: Controls the external charge pump or 5 V supply by the PSW_N pin.
BUS
: Charges V
reserved
R/W/S/C
BUS
BUS
: Discharges V
5
0
BUS
.
Indicator: Informs the PHY to use an external V
Rev. 01 — 14 August 2007
.
BUS
BUS
Table 35
BUS
BUS
BUS
.
is discharged (see bit DISCHRG_VBUS), and that both the DP and
R/W/S/C
CHRG_
valid indicator signal input from the FAULT pin.
.
VBUS
through a resistor. Used for the V
BUS
4
0
shows the bit allocation of the register.
through a resistor. If the link sets this bit to logic 1, it waits
DISCHRG_
R/W/S/C
VBUS
3
0
ISP1508A; ISP1508B
DM_PULL
R/W/S/C
DOWN
2
1
BUS
ULPI HS USB transceiver
pulsing of SRP. The link
BUS
DP_PULL
R/W/S/C
DOWN
overcurrent indicator.
1
1
© NXP B.V. 2007. All rights reserved.
ID_PULL
R/W/S/C
UP
0
0
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