ML2036CP Fairchild Semiconductor, ML2036CP Datasheet - Page 2

RF Receiver DIP-14 SINE WAVE GEN

ML2036CP

Manufacturer Part Number
ML2036CP
Description
RF Receiver DIP-14 SINE WAVE GEN
Manufacturer
Fairchild Semiconductor
Type
Multiple RS-232 Drivers and Receiversr
Datasheet

Specifications of ML2036CP

Package / Case
PDIP-14
Operating Supply Voltage
15 V
Maximum Operating Temperature
70 C
Minimum Operating Temperature
0 C
Mounting Style
Through Hole
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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ML2036
Pin Configuration
Pin Description
2
10 (11)
11 (12)
12 (13)
13 (15)
14 (16)
9 (10)
1 (2)
2 (3)
3 (4)
4 (5)
5 (6)
6 (7)
7 (8)
8 (9)
PIN
P
CLK IN
NAME
OUT 1
OUT 2
AGND
DGND
DN
GAIN
V
SCK
LATI
V
CLK
CLK
V
SID
V
OUT
REF
CC
SS
-INH Three level input which controls the inhibit and power down modes. Current source pull-up
CLK OUT 1
CLK OUT 2
P DN -INH
Negative supply (-5V).
to V
Digital clock output from the internal clock generator that can drive other devices at f
1
Digital clock output from the internal clock generator that can drive other devices at f
2
Serial clock. Digital input which clocks in serial data on its rising edges.
Serial input data which programs the frequency of V
Digital input which latches serial data into the internal data latch on falling edges.
Positive supply (5V).
Reference input. The voltage on this pin determines the peak-to-peak swing of V
can be tied to V
Analog output.
Analog ground. All analog inputs and outputs are referenced to this point.
Digital ground. All digital inputs and outputs are referenced to this point.
Sets V
Clock input. The internal clock can be generated by tying a 3 to 12MHz crystal from this pin
to DGND, or by applying a digital clock signal directly to the pin.
LATI
SCK
(Pin Number in Paranthesis is for SOIC Version)
= f
= f
V SS
SID
14-Pin PDIP (P14)
CC
CLK IN
CLK IN
.
OUT
1
2
3
4
5
6
7
TOP VIEW
ML2036
/2.
/8.
peak amplitude to V
14
13
12
11
10
9
8
CC
.
CLK IN
GAIN
DGND
AGND
V OUT
V REF
V CC
REF
or V
REF
FUNCTION
CLK OUT 1
CLK OUT 2
/2. Current source pull-down to DGND.
PDN-INH
SCK
LATI
V SS
SID
NC
16-Pin Wide SOIC (S16W)
OUT
.
1
2
3
4
5
6
7
8
TOP VIEW
ML2036
PRODUCT SPECIFICATION
16
15
14
13
12
11
10
9
REV. 1.0.2 7/26/01
CLK IN
GAIN
NC
DGND
AGND
V OUT
V REF
V CC
OUT
CLK OUT
CLK OUT
. V
REF

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