MC33594FTAE Freescale Semiconductor, MC33594FTAE Datasheet - Page 9

• Manufacturer Part Number: MC33594FTAE
• Description: RF Receiver UHF RECEIVER
• Manufacturer: Freescale Semiconductor
• Type: Receiverr

Specifications of MC33594FTAE

• Package / Case: LQFP-24
• Operating Frequency: 434 MHz
• Operating Supply Voltage: 5 V
• Maximum Operating Temperature: + 105 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

SERIAL INTERFACE
If the SPI is not used, a Power On Reset (POR) sets ROMEO2 to operate correctly in a default configuration.
MISO lines. The master and slave devices are capable of exchanging a byte of information during a sequence of
eight clock cycles. Since SCLK is generated by the master device, this line is an input on a slave device.
The MISO line is configured as an input in a master device and as an output in a slave device. The MOSI line is
configured as an output in a master device and as an input in a slave device. The MISO and MOSI lines transfer
serial data in one direction with the most significant bit sent first. Data are captured on falling edges of SCLK.
Data are shifted out on rising edge of SCLK. When no data are output, SCLK and MOSI force a low level. Using
Motorola acronyms, this means that the clock phase and polarity control bits of the microcontroller SPI have to be
CPOL= 0 and CPHA=1.
the microcontroller is the master node providing clock information on SCLK input, control and configuration bits
on the MOSI line. If the default configuration is not the desired one, the microcontroller (MCU) can change it by
writing into the configuration registers. The configuration registers can also be read back to check their contents.
Configuration registers cannot be addressed separately, the whole configuration has to be sent as a 3x8
bitstream. The contents are written out as a 24-bit serial data stream. Transmissions which are not multiple of 24
bits may lead to unexpected configurations. The first bit transmitted on MOSI does not change the content of the
configuration registers. Note that a low level applied on RESETB does not affect the configuration register
content.
sends received data on the MOSI line and the recovered clock on SCLK. It is then recommended that the MCU
SPI is set as slave. If the data received does not fit in an entire number of bytes, the data manager will fill the last
byte. If the data received constitute an whole number of bytes, the data manager may generate and send an
extra byte whose content is irrelevant. If DME=0, the SPI is disabled. Raw data is sent on the MOSI line.
master, it is recommended that the MCU SPI is set as slave before the mode transition.
rows on tables 4, 7 & 8). In this configuration, the SPI is disabled and ROMEO2 sends raw data on the MOSI line.
This default configuration enables the circuit to operate as a standalone receiver without any external control.
After POR, RESETB forces a low level. Therefore an external pull-up resistor should be used in order to avoid
entering configuration mode.
© Motorola, Inc., 2002.
ROMEO2 and the microcontroller communicate through a Serial Peripheral Interface (SPI). It enables:
The interface is operated by the 3 following input/output pins:
The master clock is used to synchronise data movement both in and out of the device through its MOSI and
In configuration mode, as long as a low level is applied on RESETB (see state machine on figure 14 page 13),
When RESETB is set to a high level, if Data Manager is enabled (DME=1), ROMEO2 becomes master and
When ROMEO2 SPI is changed from master (run mode) to slave (configuration mode) or from slave to
At power-on, the POR resets the internal registers. This defines the receiver default configuration (see gray
- the microcontroller to set and check ROMEO2 configuration,
- ROMEO2 to send the received data.
- Serial Clock SCLK,
- Master Output Slave Input MOSI,
- Master Input Slave Output MISO.
0
MCU (master)
CR1
Figure 12: Writing into configuration registers
Freescale Semiconductor, Inc.
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CR2
MC33594
9
ROMEO2
CR3
revision 1.1, 5 February 2002
SCLK line
MOSI line