Si4720-A10-GM Silicon Laboratories Inc, Si4720-A10-GM Datasheet - Page 8

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Si4720-A10-GM

Manufacturer Part Number
Si4720-A10-GM
Description
RF Transceiver Broadcast FM Radio Transceiver
Manufacturer
Silicon Laboratories Inc
Datasheet

Specifications of Si4720-A10-GM

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Si4720/21-B20
Table 5. 2-Wire Control Interface Characteristics
(V
8
Parameter
SCLK Frequency
SCLK Low Time
SCLK High Time
SCLK Input to SDIO
(START)
SCLK Input to SDIO
SDIO Input to SCLK
SDIO Input to SCLK
SCLK input to SDIO
STOP to START Time
SDIO Output Fall Time
SDIO Input, SCLK Rise/Fall Time
SCLK, SDIO Capacitive Loading
Input Filter Pulse Suppression
Notes:
DD
1. When V
2. When selecting 2-wire mode, the user must ensure that a 2-wire start condition (falling edge of SDIO while SCLK is
3. When selecting 2-wire mode, the user must ensure that SCLK is high during the rising edge of RST, and stays high
4. The Si4720/21 delays SDIO by a minimum of 300 ns from the V
5. The maximum t
= 2.7 to 5.5 V, V
high) does not occur within 300 ns before the rising edge of RST.
until after the first start condition.
t
violated as long as all other timing parameters are met.
HD:DAT
specification.
IO
= 0 V, SCLK and SDIO are low-impedance. 2-wire control interface is I
IO
HD:DAT
= 1.5 to 3.6 V, T
Setup (STOP)
Setup
Hold (START)
Setup
Hold
has only to be met when f
4,5
A
= –20 to 85 °C)
Symbol
t
t
t
t
t
HD:STA
SU:DAT
HD:DAT
SU:STO
SU:STA
t
t
t
f
t
f:OUT
HIGH
t
LOW
t
BUF
t
SCL
C
f:IN
r:IN
SP
b
SCL
Test Condition
Rev. 1.0
= 400 kHz. At frequencies below 400 KHz, t
1,2,3
IH
threshold of SCLK to comply with the minimum
20
20
+
+
Min
100
1.3
0.6
0.6
0.6
0.6
1.3
0.1
0.1
0
0
----------- -
1 pF
----------- -
1 pF
C
C
b
b
2
C compatible.
Typ
HD:DAT
Max
400
900
250
300
50
50
may be
Unit
kHz
pF
µs
µs
µs
µs
ns
ns
µs
µs
ns
ns
ns

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