74LVC244APW-T NXP Semiconductors, 74LVC244APW-T Datasheet - Page 5

• Manufacturer Part Number: 74LVC244APW-T
• Description: Buffer/Line Driver 8-CH Non-Inverting 3-ST CMOS 20-Pin TSSOP T/R
• Manufacturer: NXP Semiconductors

Specifications of 74LVC244APW-T

• Package: 20TSSOP
• Logic Family: LVC
• Logic Function: Buffer/Line Driver
• Number Of Outputs Per Chip: 8
• Output Type: 3-State
• Input Signal Type: Single-Ended
• Maximum Propagation Delay Time @ Maximum Cl: 2.8(Typ)@3.3V ns
• Tolerant I/os: 5 V
• Typical Quiescent Current: 0.1 uA
• Polarity: Non-Inverting

NXP Semiconductors
6. Functional description
Table 3.
[1]
7. Limiting values
Table 4.
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
[1]
[2]
[3]
74LVC_LVCH244A_6
Product data sheet
Control
nOE
L
L
H
Symbol
V
I
V
I
V
I
I
I
T
P
IK
OK
O
CC
GND
stg
CC
I
O
tot
H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high-impedance OFF-state.
The minimum input voltage ratings may be exceeded if the input current ratings are observed.
The output voltage ratings may be exceeded if the output current ratings are observed.
For SO20 packages: above 70 C derate linearly with 8 mW/K.
For (T)SSOP20 packages: above 60 C derate linearly with 5.5 mW/K.
For DHVQFN20 and DHXQFN20U packages: above 60 C derate linearly with 4.5 mW/K.
Function table
Limiting values
Parameter
supply voltage
input clamping current
input voltage
output clamping current
output voltage
output current
supply current
ground current
storage temperature
total power dissipation
[1]
Input
nAn
L
H
X
Conditions
V
V
output HIGH or LOW
output 3-state
V
T
amb
I
O
O
Rev. 06 — 13 August 2009
< 0 V
> V
= 0 V to V
= 40 C to +125 C
CC
or V
CC
O
74LVC244A; 74LVCH244A
< 0 V
[1]
[2]
[2]
[3]
Output
nYn
L
H
Z
Min
-
-
-
-
0.5
50
0.5
0.5
0.5
100
65
Octal buffer/line driver; 3-state
Max
+6.5
-
+6.5
V
+6.5
100
-
+150
500
50
50
CC
+ 0.5
© NXP B.V. 2009. All rights reserved.
Unit
V
mA
V
mA
V
V
mA
mA
mA
mW
C
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