PDTA113ZT,215 NXP Semiconductors, PDTA113ZT,215 Datasheet

TRANS PNP W/RES 50V SOT-23

PDTA113ZT,215

Manufacturer Part Number
PDTA113ZT,215
Description
TRANS PNP W/RES 50V SOT-23
Manufacturer
NXP Semiconductors
Datasheet

Specifications of PDTA113ZT,215

Package / Case
TO-236-3, SC-59, SOT-23-3
Transistor Type
PNP - Pre-Biased
Current - Collector (ic) (max)
100mA
Voltage - Collector Emitter Breakdown (max)
50V
Resistor - Base (r1) (ohms)
1K
Resistor - Emitter Base (r2) (ohms)
10K
Dc Current Gain (hfe) (min) @ Ic, Vce
35 @ 5mA, 5V
Vce Saturation (max) @ Ib, Ic
150mV @ 500µA, 10mA
Current - Collector Cutoff (max)
1µA
Power - Max
250mW
Mounting Type
Surface Mount
Configuration
Single
Transistor Polarity
PNP
Typical Input Resistor
1 KOhm
Typical Resistor Ratio
0.1
Mounting Style
SMD/SMT
Collector- Emitter Voltage Vceo Max
50 V
Peak Dc Collector Current
100 mA
Maximum Operating Temperature
+ 150 C
Minimum Operating Temperature
- 65 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
934058195215
PDTA113ZT T/R
PDTA113ZT T/R
1. Product profile
1.1 General description
1.2 Features
1.3 Applications
1.4 Quick reference data
PNP resistor-equipped transistors.
Table 1.
[1]
I
I
I
I
Table 2.
Type number
PDTA113ZE
PDTA113ZK
PDTA113ZM
PDTA113ZS
PDTA113ZT
PDTA113ZU
Symbol
V
I
R1
R2/R1
O
CEO
PDTA113Z series
PNP resistor-equipped transistors; R1 = 1 k , R2 = 10 k
Rev. 04 — 2 September 2009
Built-in bias resistors
Simplifies circuit design
General purpose switching and
amplification
Inverter and interface circuits
Also available in SOT54A and SOT54 variant packages (see
Product overview
Quick reference data
[1]
Parameter
collector-emitter voltage
output current (DC)
bias resistor 1 (input)
bias resistor ratio
Package
NXP
SOT416
SOT346
SOT883
SOT54 (TO-92)
SOT23
SOT323
Conditions
open base
I
I
I
JEITA
SC-75
SC-59
SC-101
SC-43A
-
SC-70
Reduces component count
Reduces pick and place costs
Circuit drivers
Section
Min
-
-
0.7
8
2).
Typ
-
-
1
10
Product data sheet
NPN complement
PDTC113ZE
PDTC113ZK
PDTC113ZM
PDTC113ZS
PDTC113ZT
PDTC113ZU
Max
1.3
12
50
100
Unit
V
mA
k

Related parts for PDTA113ZT,215

PDTA113ZT,215 Summary of contents

Page 1

PDTA113Z series PNP resistor-equipped transistors Rev. 04 — 2 September 2009 1. Product profile 1.1 General description PNP resistor-equipped transistors. Table 1. Type number PDTA113ZE PDTA113ZK PDTA113ZM PDTA113ZS PDTA113ZT PDTA113ZU [1] ...

Page 2

... NXP Semiconductors 2. Pinning information Table 3. Pin SOT54 SOT54A SOT54 variant SOT23, SOT323, SOT346, SOT416 SOT883 PDTA113Z_SER_4 Product data sheet PNP resistor-equipped transistors Pinning Description input (base) output (collector) GND (emitter) input (base) output (collector) GND (emitter) input (base) output (collector) GND (emitter) ...

Page 3

... NXP Semiconductors 3. Ordering information Table 4. Type number PDTA113ZE PDTA113ZK PDTA113ZM PDTA113ZS PDTA113ZT PDTA113ZU [1] Also available in SOT54A and SOT54 variant packages (see 4. Marking Table 5. Type number PDTA113ZE PDTA113ZK PDTA113ZM PDTA113ZS PDTA113ZT PDTA113ZU [ made in Hong Kong * = p: made in Hong Kong * = t: made in Malaysia * = W: made in China ...

Page 4

... NXP Semiconductors 5. Limiting values Table 6. In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol V CBO V CEO V EBO tot T stg amb [1] Refer to standard mounting conditions. [2] Reflow soldering is the only recommended soldering method. [3] Refer to SOT883 standard mounting conditions; FR4 printed-circuit board with 60 m copper strip line. ...

Page 5

... NXP Semiconductors 7. Characteristics Table 8. Characteristics unless otherwise specified amb Symbol Parameter I collector-base cut-off CBO current I collector-emitter CEO cut-off current I emitter-base cut-off EBO current h DC current gain FE V collector-emitter CEsat saturation voltage V off-state input voltage V I(off) V on-state input voltage V I(on) R1 bias resistor 1 (input) ...

Page 6

... NXP Semiconductors ( 100 C amb ( amb ( amb Fig 1. DC current gain as a function of collector current; typical values 10 V I(on) (V) 1 (1) ( amb ( amb ( 100 C amb Fig 3. On-state input voltage as a function of collector current; typical values PDTA113Z_SER_4 Product data sheet PNP resistor-equipped transistors ...

Page 7

... NXP Semiconductors 8. Package outline Plastic surface-mounted package; 3 leads DIMENSIONS (mm are the original dimensions UNIT max 0.30 0.25 0.95 mm 0.1 0.15 0.10 0.60 OUTLINE VERSION IEC SOT416 Fig 5. Package outline SOT416 (SC-75) PDTA113Z_SER_4 Product data sheet PNP resistor-equipped transistors 0.5 scale 1.8 ...

Page 8

... NXP Semiconductors Plastic surface-mounted package; 3 leads DIMENSIONS (mm are the original dimensions) UNIT 1.3 0.1 0.50 0.26 mm 1.0 0.013 0.35 0.10 OUTLINE VERSION IEC SOT346 Fig 6. Package outline SOT346 (SC-59/TO-236) PDTA113Z_SER_4 Product data sheet PNP resistor-equipped transistors scale 3.1 1.7 3.0 1.9 ...

Page 9

... NXP Semiconductors Leadless ultra small plastic package; 3 solder lands; body 1.0 x 0 DIMENSIONS (mm are the original dimensions) A (1) 1 UNIT max. 0.50 0.20 0.55 mm 0.03 0.46 0.12 0.47 Note 1. Including plating thickness OUTLINE VERSION IEC SOT883 Fig 7. Package outline SOT883 (SC-101) ...

Page 10

... NXP Semiconductors Plastic single-ended leaded (through hole) package; 3 leads DIMENSIONS (mm are the original dimensions) UNIT 5.2 0.48 0.66 0.45 mm 5.0 0.40 0.55 0.38 Note 1. Terminal dimensions within this zone are uncontrolled to allow for flow of plastic and terminal irregularities. OUTLINE VERSION IEC SOT54 Fig 8 ...

Page 11

... NXP Semiconductors Plastic single-ended leaded (through hole) package; 3 leads (wide pitch DIMENSIONS (mm are the original dimensions) UNIT 5.2 0.48 0.66 0.45 mm 5.0 0.40 0.55 0.38 Note 1. Terminal dimensions within this zone are uncontrolled to allow for flow of plastic and terminal irregularities. OUTLINE ...

Page 12

... NXP Semiconductors Plastic single-ended leaded (through hole) package; 3 leads (on-circle DIMENSIONS (mm are the original dimensions) UNIT 5.2 0.48 0.66 0.45 mm 5.0 0.40 0.55 0.38 Note 1. Terminal dimensions within this zone are uncontrolled to allow for flow of plastic and terminal irregularities. OUTLINE VERSION ...

Page 13

... NXP Semiconductors Plastic surface-mounted package; 3 leads DIMENSIONS (mm are the original dimensions UNIT max. 1.1 0.48 0.15 mm 0.1 0.9 0.38 0.09 OUTLINE VERSION IEC SOT23 Fig 11. Package outline SOT23 (TO-236AB) PDTA113Z_SER_4 Product data sheet PNP resistor-equipped transistors scale 3.0 1.4 2.5 1.9 ...

Page 14

... NXP Semiconductors Plastic surface-mounted package; 3 leads DIMENSIONS (mm are the original dimensions UNIT b p max 1.1 0.4 0.25 mm 0.1 0.8 0.3 0.10 OUTLINE VERSION IEC SOT323 Fig 12. Package outline SOT323 (SC-70) PDTA113Z_SER_4 Product data sheet PNP resistor-equipped transistors scale 2.2 1.35 2.2 1 ...

Page 15

... NXP Semiconductors 9. Packing information Table 9. Packing methods The indicated -xxx are the last three digits of the 12NC ordering code. Type number Package PDTA113ZE SOT416 PDTA113ZK SOT346 PDTA113ZM SOT883 PDTA113ZS SOT54 SOT54A SOT54A SOT54 variant PDTA113ZT SOT23 PDTA113ZU SOT323 [1] For further information and the availability of packing methods, see ...

Page 16

... Document ID Release date PDTA113Z_SER_4 20090902 • Modifications: This data sheet was changed to reflect the new company name NXP Semiconductors, including new legal definitions and disclaimers. No changes were made to the technical content. • Figure 5 “Package outline SOT416 • Figure 6 “Package outline SOT346 • ...

Page 17

... Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice ...

Page 18

... NXP Semiconductors 13. Contents 1 Product profi 1.1 General description 1.2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 1.3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 1.4 Quick reference data Pinning information . . . . . . . . . . . . . . . . . . . . . . 2 3 Ordering information . . . . . . . . . . . . . . . . . . . . . 3 4 Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 5 Limiting values Thermal characteristics Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 5 8 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 7 9 Packing information Revision history . . . . . . . . . . . . . . . . . . . . . . . . 16 11 Legal information ...

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