CY29942AC Cypress Semiconductor Corp, CY29942AC Datasheet

CY29942AC

Manufacturer Part Number
CY29942AC
Description
Manufacturer
Cypress Semiconductor Corp
Datasheet

Specifications of CY29942AC

Number Of Outputs
18
Operating Supply Voltage (max)
3.465V
Operating Temp Range
0C to 70C
Propagation Delay Time
4.4ns
Operating Supply Voltage (min)
2.375V
Mounting
Surface Mount
Pin Count
32
Operating Supply Voltage (typ)
2.5/3.3V
Package Type
LQFP
Quiescent Current
7mA
Input Frequency
200MHz
Duty Cycle
55%
Operating Temperature Classification
Commercial
Lead Free Status / RoHS Status
Not Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CY29942AC
Manufacturer:
CY
Quantity:
729
Features
Cypress Semiconductor Corporation
Document #: 38-07284 Rev. *D
Logic Block Diagram
200 MHz Clock Support
2.5V or 3.3V Operation
LVCMOS/LVTTL Clock Input
LVCMOS-/LVTTL-Compatible Inputs
18 Clock Outputs: Drive up to 36 Clock Lines
110 ps Typical Output-to-output Skew
Output Enable Control
Pin Compatible with MPC942C
Available in Industrial and Commercial
32-pin LQFP package
TCLK
OE
198 Champion Court
2.5V or 3.3V, 200 MHz, 1:18 Clock
Description
The CY29942 is a low voltage 200 MHz clock distribution buffer
with an LVCMOS or LVTTL compatible input clock. All other
control inputs are LVCMOS/LVTTL compatible. The eighteen
outputs are 2.5V or 3.3V LVCMOS or LVTTL compatible and can
drive 50Ω series or parallel terminated transmission lines. For
series terminated transmission lines, each output can drive one
or two traces giving the devices an effective fanout of 1:36. Low
output-to-output skews make the CY29942 an ideal clock distri-
bution buffer for nested clock trees in the most demanding of
synchronous systems.
VDD
18
Q0-Q17
San Jose
,
CA 95134-1709
Distribution Buffer
Revised September 10, 2009
CY29942
408-943-2600
[+] Feedback

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CY29942AC Summary of contents

Page 1

... Available in Industrial and Commercial ■ 32-pin LQFP package Logic Block Diagram Cypress Semiconductor Corporation Document #: 38-07284 Rev. *D 2.5V or 3.3V, 200 MHz, 1:18 Clock Description The CY29942 is a low voltage 200 MHz clock distribution buffer with an LVCMOS or LVTTL compatible input clock. All other control inputs are LVCMOS/LVTTL compatible ...

Page 2

Pinouts [1] Table 1. Pin Description Pin Name 3 TCLK 10, 11, 13, 14, 15, 18, 19, 20, Q(17:0) 22, 23, 24, 26, 27, 28, 30, 31 16, 21, 29 VDD 1, 2, 12, ...

Page 3

Maximum Ratings [2] Maximum Input Voltage Relative to V :............. V SS Maximum Input Voltage Relative to V :............. V DD Storage Temperature: ...................................... –65° to 150°C Operating Temperature:..................................... –40° to 85°C Maximum ESD protection............................................... 2 kV Maximum Power Supply:................................................ ...

Page 4

AC Parameters V = 3.3V ±5% or 2.5V ±5 3.3V ±5% or 2.5V ±5%, Over the specified temperature range DD DDC Parameter Description Fmax Input Frequency Tpd TTL_CLK to Q Delay [ FoutDC Output Duty Cycle ...

Page 5

... Figure 5. Ordering Information Part Number CY29942AI 32-Pin LQFP CY29942AIT 32-Pin LQFP – Tape and Reel CY29942AC 32-Pin LQFP Pb-free CY29942AXI 32-Pin LQFP CY29942AXIT 32-Pin LQFP – Tape and Reel CY29942AXC 32-Pin LQFP CY29942AXCT 32-Pin LQFP – Tape and Reel Document #: 38-07284 Rev. *D Figure 4 ...

Page 6

Package Drawing and Dimensions 32-Pin Thin Plastic Quad Flatpack 1.4 mm A32.14 Document #: 38-07284 Rev. *D CY29942 51-85088-*B Page [+] Feedback ...

Page 7

... New datasheet Added a Commercial Temp. Range in the Ordering Information Add power up requirements to maximum rating information. Added Lead-free devices Added typical value for output-output skew Ordering Information table: fixed typo and removed obsolete CY29942ACT. Changed Lead-free to Pb-free. psoc.cypress.com clocks.cypress.com image.cypress.com Revised September 10, 2009 ...

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