85304-01PG8 IDT, Integrated Device Technology Inc, 85304-01PG8 Datasheet

85304-01PG8

Manufacturer Part Number
85304-01PG8
Description
Manufacturer
IDT, Integrated Device Technology Inc
Type
Clock Driverr
Datasheet

Specifications of 85304-01PG8

Number Of Clock Inputs
2
Mode Of Operation
Differential
Output Frequency
650MHz
Output Logic Level
LVPECL
Operating Supply Voltage (min)
3.135V
Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (max)
3.465V
Package Type
TSSOP
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
20
Lead Free Status / RoHS Status
Not Compliant
FEATURES:
• Five differential 3.3V LVPECL outputs
• Selectable differential CLK, xCLK, or LVPECL clock inputs
• CLK, xCLK pair can accept the following differential input levels:
• PCLK, xPCLK supports the following input types: LVPECL, CML,
• Maximum output frequency: 650MHz
• Translates any single-ended input signal to 3.3V LVPECL levels
• Output skew: 35ps (max.)
• Part-to-part skew: as low as 150ps
• Propagation delay: 2.1ns (max.)
• 3.3V operating supply
• Available in TSSOP package
FUNCTIONAL BLOCK DIAGRAM
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES
c
IDT85304-01
LOW SKEW, 1-TO-5 DIFFERENTIAL-TO-3.3V LVPECL
LVDS, LVPECL, LVHSTL, SSTL, and HCSL
and SSTL
with resistor bias on xCLK input
2006
Integrated Device Technology, Inc.
CLK_SEL
CLK_EN
xPCLK
PCLK
xCLK
CLK
LOW SKEW, 1-TO-5
DIFFERENTIAL-TO-3.3V
LVPECL FANOUT BUFFER
1
0
1
D
LE
DESCRIPTION:
3.3V LVPECL clock generator-divider. It has two selectable clock inputs. The
CLK/ xCLK pair can accept most standard differential input levels. The PCLK/
xPCLK pair can accept LVPECL, CML, or SSTL input levels. The clock enable
is internally synchronized to eliminate runt pulses on the outputs during
asynchronous assertion/deassertion of the clock enable pin.
01 ideal for those applications that demand well-defined performance and
repeatability.
The IDT85304-01 is a low skew, high performance 1-to-5 differential-to-
Guaranteed output and part-to-part skew characteristics make the IDT85304-
COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES
Q
Q0
xQ0
Q1
xQ1
Q2
xQ2
Q3
xQ3
Q4
xQ4
FEBRUARY 2009
IDT85304-01
DSC 6174/8

Related parts for 85304-01PG8

85304-01PG8 Summary of contents

Page 1

... DIFFERENTIAL-TO-3.3V LVPECL FANOUT BUFFER DESCRIPTION: The IDT85304- low skew, high performance 1-to-5 differential-to- 3.3V LVPECL clock generator-divider. It has two selectable clock inputs. The CLK/ xCLK pair can accept most standard differential input levels. The PCLK/ xPCLK pair can accept LVPECL, CML, or SSTL input levels. The clock enable is internally synchronized to eliminate runt pulses on the outputs during asynchronous assertion/deassertion of the clock enable pin ...

Page 2

... IDT85304-01 LOW SKEW, 1-TO-5 DIFFERENTIAL-TO-3.3V LVPECL PIN CONFIGURATION Q0 1 xQ0 xQ1 xQ2 xQ3 xQ4 TSSOP TOP VIEW PIN DESCRIPTION (1) Symbol Number xQ0 Output xQ1 Output xQ2 Output xQ3 Output xQ4 Output V 11, 18, 20 Power DD CLK_SEL 12 Input CLK 13 Input xCLK 14 Input V 15 ...

Page 3

... IDT85304-01 LOW SKEW, 1-TO-5 DIFFERENTIAL-TO-3.3V LVPECL CONTROL INPUT FUNCTION TABLE Inputs CLK_EN CLK_SEL NOTES: 1. After CLK_EN switches, the clock outputs are disabled or enabled following a rising and falling input clock edge as shown in the CLK_EN Timing Diagram below active mode, the state of the outputs is a function of the CLK / xCLK and PCLK / xPCLK inputs as described in the Clock Input Function table. ...

Page 4

... IDT85304-01 LOW SKEW, 1-TO-5 DIFFERENTIAL-TO-3.3V LVPECL POWER SUPPLY CHARACTERISTICS Symbol Parameter V Positive Supply Voltage DD I Power Supply Current EE DC ELECTRICAL CHARACTERISTICS, LVCMOS / LVTTL Symbol Parameter V Input Voltage, HIGH CLK_EN, IH CLK_SEL V Input Voltage, LOW CLK_EN, IL CLK_SEL I Input Current HIGH CLK_EN IH CLK_SEL I Input Current LOW ...

Page 5

... IDT85304-01 LOW SKEW, 1-TO-5 DIFFERENTIAL-TO-3.3V LVPECL AC ELECTRICAL CHARACTERISTICS All parameters measured at 500MHz unless noted otherwise; Cycle-to-cycle jitter = jitter on output; the part does not add jitter Symbol Parameter F Output Frequency MAX (1) t Propagation Delay Output Skew (2, Part-to-Part Skew (3, Output Rise Time R t Output Fall Time ...

Page 6

... IDT85304-01 LOW SKEW, 1-TO-5 DIFFERENTIAL-TO-3.3V LVPECL PARAMETER MEASUREMENT INFORMATION V DD LVPECL -1.3V ± 0.135V EE xCLK, xPCLK CLK, PCLK xQx Qx xQy Qy COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES Z = 50Ω 50Ω Output Load Test Circuit V DD Cross Points Differential Input Level t SK(0) Output Skew ...

Page 7

... IDT85304-01 LOW SKEW, 1-TO-5 DIFFERENTIAL-TO-3.3V LVPECL PARAMETER MEASUREMENT INFORMATION - CONTINUED Clock Outputs xCLK, xPLK CLK, PCLK xQ0, xQ1, xQ2, xQ3, xQ4 Q0, Q1, Q2, Q3, Q4 xQ0, xQ1, xQ2, xQ3, xQ4 Q0, Q1, Q2, Q3, xQ4 COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES 80% 20 Input and Output Rise and Fall Time ...

Page 8

... IDT85304-01 LOW SKEW, 1-TO-5 DIFFERENTIAL-TO-3.3V LVPECL APPLICATION INFORMATION WIRING THE DIFFERENTIAL INPUT TO ACCEPT SINGLE-ENDED LEVELS The diagram below shows how the differential input can be wired to accept single-ended levels. The reference voltage V bias resistors R1, R2, and C1. This bias circuit should be located as close as possible to the input pin. The ratio of R1 and R2 might need to be adjusted to position the V in the center of the input voltage swing ...

Page 9

... This section provides information on power dissipation and junction temperature for the IDT85304-01. Equations and example calculations are also provided. POWER DISSIPATION: The total power dissipation for the IDT85304-01is the sum of the core power plus the power dissipated in the load(s). The following is the power dissipation for the ...

Page 10

... IDT85304-01 LOW SKEW, 1-TO-5 DIFFERENTIAL-TO-3.3V LVPECL CALCULATIONS AND EQUATIONS To calculate worst case power dissipation into the load, use the following equations, which assume a 50Ω load and a termination voltage of V For Logic HIGH OUT OH MAX DD MAX (V _ – MAX OH MAX For Logic LOW: V ...

Page 11

... COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES Commercial (0°C to +70°C) Blank I Industrial (-40°C to +85°C) PG Thin Shrink Small Outline Package PGG TSSOP - Green Low Skew, 1-to-5 Differential-to-3.3V LVPECL 85304-01 Fanout Buffer for SALES: for Tech Support: 800-345-7015 or 408-284-8200 clockhelp@idt.com fax: 408-284-2775 www.idt.com 11 ...

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