LT1739IUE#PBF Linear Technology, LT1739IUE#PBF Datasheet - Page 7

• Manufacturer Part Number: LT1739IUE#PBF
• Manufacturer: Linear Technology

Specifications of LT1739IUE#PBF

• Power Supply Requirement: Dual
• Slew Rate: 200V/us
• Pin Count: 12
• Lead Free Status / RoHS Status: Compliant

APPLICATIO S I FOR ATIO
The LT1739 is a high speed, 200MHz gain bandwidth
product, dual voltage feedback amplifier with high output
current drive capability, 500mA source and sink. The
LT1739 is ideal for use as a line driver in xDSL data
communication applications. The output voltage swing
has been optimized to provide sufficient headroom when
operating from 12V power supplies in full-rate ADSL
applications. The LT1739 also allows for an adjustment of
the operating current to minimize power consumption. In
addition, the LT1739 is available in small footprint
3mm
package to minimize PCB area in multiport central office
DSL cards.
To minimize signal distortion, the LT1739 amplifiers are
decompensated to provide very high open-loop gain at
high frequency. As a result each amplifier is frequency
stable with a closed-loop gain of 10 or more. If a closed-
loop gain of less than 10 is desired, external frequency
compensating components can be used.
Setting the Quiescent Operating Current
Power consumption and dissipation are critical concerns
in multiport xDSL applications. Two pins, Shutdown
(SHDN) and Shutdown Reference (SHDNREF), are pro-
vided to control quiescent power consumption and allow
for the complete shutdown of the driver. The quiescent
current should be set high enough to prevent distortion
induced errors in a particular application, but not so high
that power is wasted in the driver unnecessarily. A good
starting point to evaluate the LT1739 is to set the quiescent
current to 10mA per amplifier.
The internal biasing circuitry is shown in Figure 1. Ground-
ing the SHDNREF pin and directly driving the SHDN pin with
a voltage can control the operating current as seen in the
Typical Performance Characteristics. When the SHDN pin
is less than SHDNREF + 0.4V, the driver is shut down and
consumes typically only 100 A of supply current and the
outputs are in a high impedance state. Part to part varia-
tions, however, will cause inconsistent control of the qui-
escent current if direct voltage drive of the SHDN pin is used.
Using a single external resistor, R
two ways provides a much more predictable control of the
quiescent supply current. Figure 2 illustrates the effect
4mm DFN and 20-lead TSSOP surface mount
U
U
BIAS
W
, connected in one of
U
on supply current per amplifier with R
between the SHDN pin and the 12V V
LT1739 and the approximate design equations. Figure 3
illustrates the same control with R
the SHDNREF pin and ground while the SHDN pin is tied
to V
30
25
20
15
10
45
40
35
30
25
20
15
10
5
0
5
0
+
4
7
. Either approach is equally effective.
V
V
S
S
= 12V
= 12V
7
Figure 1. Internal Current Biasing Circuitry
Figure 3. R
10
Figure 2. R
10
CIRCUITRY
START-UP
I
I
I
BIAS
SUPPLY
30
TO
40
=
50
2
5
BIAS
PER AMPLIFIER (mA) = 64 • I
5I
I
SHDNREF
SHDN
70
BIAS
SHDN
to Ground Current Control
70
90
= I
2k
to V
SHDNREF
V
R
2I
R
100
+
BIAS
BIAS
= 12V
V
+
+
R
100
130
SHDN
SHDNREF
(k )
(k )
BIAS
Current Control
= 12V
1739 F01
R
1k
SHDN
SHDNREF
BIAS
BIAS
I
R
150
S
2I
BIAS
I
TO AMPLIFIERS
BIAS CIRCUITRY
I
R
PER AMPLIFIER (mA)
BIAS
S
BIAS
PER AMPLIFIER (mA)
170
=
130
I
=
connected between
S
I
PER AMPLIFIER (mA)
S
BIAS
PER AMPLIFIER (mA)
190
+
V
BIAS
+
V
– 1.2V
+
210
supply of the
– 1.2V
160
LT1739
230
connected
R
V
1739fas, sn1739
BIAS
+
R
V
BIAS
– 1.2V
+
250
• 25.6 – 2k
– 1.2V
+ 2k
190
• 64 – 5k
+ 5k
270 290
• 25.6
1739 F03
1739 F02
• 64
7