PXB4221EV34GXP Infineon Technologies, PXB4221EV34GXP Datasheet - Page 35

• Manufacturer Part Number: PXB4221EV34GXP
• Manufacturer: Infineon Technologies

Specifications of PXB4221EV34GXP

• Data Rate: 2.048Mbps
• Number Of Channels: 1
• Operating Supply Voltage (typ): 3.3V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Compliant

3.1
3.1.1
A port that is configured to ATM mode offers ITU-T G.804 [26] compliant ATM cell
mapping into PDH frames at E1 or T1 datarates. ATM mode can be enabled via “p_atm”
in register “pcfN”.
3.1.2
A port that is configured to AAL mode offers ATM Forum [10] compliant circuit emulation
services via AAL1 as defined in ITU-T I.361.1 [31]. A port N can be configured to AAL
mode via “p_atm” in register “pcfN”.
Some features of the AAL mode are controlled by the internal registers “acfg”, “caal”,
“bp32”, “bp10” and “cfil”. The features controlled by these registers are common to all
AAL ports.
Some features of the AAL mode can be controlled per port, by programming the port
configuration registers “pcfN”.
Some features of the AAL mode can be controlled per channel, by programming the
channel specific “AAL Reference Slot” in the internal configuration RAM’s (RAM1 for
receive ports, RAM2, RAM3 and RAM4 for transmit ports).
3.1.2.1
A 2.048 Mbit/s (E1) or 1.544 Mbit/s (T1) bitstream is packed into ATM cells without any
framing. No alignment between octets in E1 or T1 frames and octets in the ATM cells is
done.
For this Unstructured T1/E1 Circuit Emulation Service (CES) the ATM adaptation layer
type 1(AAL1) with Unstructured Data Transfer (UDT) as defined in ITU-T I.363.1[31] is
used. The use of partially filled cells is possible.
For clock recovery the IWE8 supports the Synchronous Residual Time Stamp (SRTS)
method and Adaptive Clock Method (ACM).
• SRTS is possible on channels with completely filled cells
• ACM can be used on both, channels with partially and completely filled cells
A port is programmed to unstructured CES via “p_ces” in the Port Configuration Register
“pcfN”.
Per port a Segmentation Buffer with a maximum size of 16 cells and a Reassembly
Buffer with a maximum size of 256 cells is implemented in external RAM.
Data Sheet
Operating Modes
ATM Mode
AAL Mode
Unstructured CES Mode
35
PXB 4219E, PXB 4220E, PXB 4221E
Functional Description
IWE8, V3.4
2003-01-20