LAN9118-MT Standard Microsystems (SMSC), LAN9118-MT Datasheet - Page 33

• Manufacturer Part Number: LAN9118-MT
• Manufacturer: Standard Microsystems (SMSC)

Specifications of LAN9118-MT

• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (min): 2.97V
• Operating Supply Voltage (max): 3.63V
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 100
• Lead Free Status / RoHS Status: Compliant

High Performance Single-Chip 10/100 Non-PCI Ethernet Controller
Datasheet
SMSC LAN9118
3.9.2.1
The host can disable the EEPROM interface through the GPIO_CFG register. When the interface is
disabled, the EEDIO and ECLK signals can be used as general-purpose outputs, or they may be used
to monitor internal MII signals.
Supported EEPROM Operations
The EEPROM controller supports the following EEPROM operations under host control via the
E2P_CMD register. The operations are commonly supported by “93C46” EEPROM devices. A
description and functional timing diagram is provided below for each operation. Please refer to the
E2P_CMD register description in
page 91
ERASE (Erase Location): If erase/write operations are enabled in the EEPROM, this command will
erase the location selected by the EPC Address field (EPC_ADDR). The EPC_TO bit is set if the
EEPROM does not respond within 30ms.
for E2P_CMD field settings for each command.
Busy Bit = 0
EEPROM Write
Figure 3.3 EEPROM Access Flow Diagram
Write Data
Command
Command
Register
Register
Register
Write
Read
Idle
DATASHEET
Section 5.3.23, "E2P_CMD – EEPROM Command Register," on
33
EEPROM Read
Read Data
Command
Command
Register
Register
Register
Write
Read
Idle
Busy Bit = 0
Revision 1.5 (07-11-08)