TXC-06885BIOG Transwitch Corporation, TXC-06885BIOG Datasheet - Page 102

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TXC-06885BIOG

Manufacturer Part Number
TXC-06885BIOG
Description
Manufacturer
Transwitch Corporation
Datasheet

Specifications of TXC-06885BIOG

Operating Supply Voltage (typ)
1.8/3.3V
Operating Temperature Classification
Industrial
Package Type
BGA
Mounting
Surface Mount
Lead Free Status / RoHS Status
Not Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
TXC-06885BIOG
Manufacturer:
TRANSWITCH
Quantity:
10
Envoy-CE4 Device
DATA SHEET
TXC-06885
27A4
27A8
27AC RW
27B0
1 0 2 o f 1 2 8
(hex)
Addr
RW
RO
RW
RO
RO
RW
RO
Mode
12-0
31-13
12-0
31-13
15-0
31-16
15-0
31-16
range
Bit
1FFF
0
1FFF
0
FFFF
0
FFFF
0
value after
Default
reset
-
Memory Maps and Bit Descriptions
Flow Control High Threshold CMAC D: This register sets the high
threshold in multiples of 8 bytes, for Ports 24 to 31 (serviced by
Configurable MAC D), for generation of PAUSE frames or asserting
raise carrier. In the event one of the Ethernet port’s ingress FIFO
(serviced by Configurable MAC D) reaches this threshold, a Pause
frame will be sent or raise carrier will be asserted from that port.
Note: Automatic pause frame generation needs to be enabled.
Reserved
Flow Control Low Threshold CMAC D: This register sets the low
threshold in multiples of 8 bytes, for Ports 24 to 31 (serviced by
Configurable MAC D), to stop generation of PAUSE frames or de-
asserting raise carrier. In the event one of the Ethernet port’s ingress
FIFO (serviced by Configurable MAC D) reaches this threshold, when in
the pause frame generation state, further generation of Pause frames
will halt or raise carrier will be de-asserted from that port.
Note: Automatic pause frame generation needs to be enabled. Pause
frame generation state is reached once the Pause high threshold is
crossed.
Reserved
Pause Frame Regeneration Timer CMAC A: This register sets the
Pause frame regeneration time in Pause Quanta (1 Pause Quanta = 512
bit times) for ports 0 to 7, (serviced by Configurable MAC A). The Pause
Frame Regeneration time sets the time between consecutive Pause
frames from an ethernet port, while the port is in the Pause Generation
state.
Note: Pause frame generation state is reached once the Pause high
threshold is crossed and the Pause low threshold is not reached.
Reserved
Pause Frame Regeneration Timer CMAC B: This register sets the
Pause frame regeneration time in Pause Quanta (1 Pause Quanta = 512
bit times) for ports 8 to 15, (serviced by Configurable MAC B). The Pause
Frame Regeneration time sets the time between consecutive Pause
frames from an ethernet port, while the port is in the Pause Generation
state.
Note: Pause frame generation state is reached once the Pause high
threshold is crossed and the Pause low threshold is not reached.
Reserved
Description
-
PRELIMINARY TXC-06885-MB, Ed. 6A
February 2005

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