LULXT9785MBC.D0 Intel, LULXT9785MBC.D0 Datasheet - Page 194

• Manufacturer Part Number: LULXT9785MBC.D0
• Manufacturer: Intel

Specifications of LULXT9785MBC.D0

• Lead Free Status / RoHS Status: Compliant

LXT9785/LXT9785E
Datasheet
249241, Revision 11.0
16 April 2007
Table 85
Table 86
Table 87
Cortina Systems
Status Register (Address 1)
PHY Identification Register 1 (Address 2)
PHY Identification Register 2 (Address 3)
®
1. R = Read Only
2.
1. R = Read Only
1. R = Read Only
2. Refer to the Identification Information section in the Cortina Systems
15:10
15:0
Bit
LXT9785 and LXT9785E Advanced 8-Port 10/100 Mbps PHY Transceivers
Bit
Bit
9:4
3:1
6
5
4
3
2
1
0
0
Update.
Bits that Latch High (LH) or Latch Low (LL) automatically clear when read.
Name
MF Preamble
Suppression
Auto-Negotiation
complete
Remote Fault
Auto-Negotiation
Ability
Link Status
Jabber Detect
Extended Capability
Name
PHY ID Number
Name
PHY ID Number
Manufacturer’s
Model Number
Manufacturer’s
Revision
Number
Model Variant
Description
The PHY identifier composed of bits 3 through 18 of the
OUI
Description
The PHY identifier composed of bits 19 through 24 of
the OUI
6 bits containing manufacturer’s part number
3 bits containing manufacturer’s revision number
0 = LXT9785
1 = LXT9785/LXT9785E
Description
0 = PHY will not accept management frames with
1 = PHY accepts management frames with preamble
0 = Auto-negotiation not complete
1 = Auto-negotiation complete
0 = No remote fault condition detected
1 = Remote fault condition detected
0 = PHY is not able to perform auto-negotiation
1 = PHY is able to perform auto-negotiation
0 = Link is down
1 = Link is up
0 = Jabber condition not detected
1 = Jabber condition detected
0 = Basic register capabilities
1 = Extended register capabilities
preamble suppressed
suppressed
®
LXT9785/LXT9785E Specification
7.0 Register Definitions
Type
Type
R
R
R
R
R
Type
R/LH
R/LL
R/LL
1
R
R
R
R
1
2
1,
Default
0013 hex
011110
001111
Default
Page 194
XXX
Default
X
2
0
0
0
1
0
0
1
2