1892YLF IDT, Integrated Device Technology Inc, 1892YLF Datasheet - Page 130

no-image

1892YLF

Manufacturer Part Number
1892YLF
Description
Manufacturer
IDT, Integrated Device Technology Inc
Datasheet

Specifications of 1892YLF

Lead Free Status / RoHS Status
Compliant
10.5.7 MII Management Interface Timing
ICS1892, Rev. D, 2/26/01
Table 10-14
timings of signals on the MDC and MDIO pins).
Table 10-14. MII Management Interface Timing
† All ICS1892 parts are tested at 25 MHz (a 40-ns period) with a 50-pF load. Designs must account for all board loading
of MDC.
Figure 10-7. MII Management Interface Timing Diagram
MDC
MDIO
(Output)
MDC
MDIO
(Input)
Period
Time
t1
t2
t3
t4
t5
t6
ICS1892 Data Sheet
MDC Minimum High Time
MDC Minimum Low Time
MDC Period
MDC Rise Time to MDIO Valid
MDIO Setup Time to MDC
MDIO Hold Time after MDC
lists the significant time periods for the MII Management Interface timing (which consists of
t1
© 2000-2001, Integrated Circuit Systems, Inc.
All rights reserved.
Parameter
t3
t2
t5
t4
t6
130
Figure 10-7
shows the timing diagram for the time periods.
Conditions
Chapter 10 DC and AC Operating Conditions
400†
Min.
160
160
10
10
0
Typ.
February 26, 2001
Max.
300
Units
ns
ns
ns
ns
ns
ns

Related parts for 1892YLF