SX1233IMLTRT Semtech, SX1233IMLTRT Datasheet - Page 4

• Manufacturer Part Number: SX1233IMLTRT
• Description: RF Transceiver Extended Bands Japan-Korea
• Manufacturer: Semtech

Specifications of SX1233IMLTRT

• Transmitting Current: 95mA
• Data Rate: 600Kbps
• Rf Ic Case Style: QFN
• No. Of Pins: 24
• Supply Voltage Range: 1.8V To 3.6V
• Operating Temperature Range: -40°C To +85°C
• Receiving Current: 17mA

Section
6.
7.
8.
9.
10.
Index of Figures
Figure 1. Block Diagram ...................................................................................................................................................................... 8
Figure 2. Pin Diagram ......................................................................................................................................................................... 9
Figure 3. Marking Diagram .................................................................................................................................................................. 9
Figure 4. TCXO Connection .............................................................................................................................................................. 16
Figure 5. Transmitter Block Diagram ................................................................................................................................................ 19
Figure 6. Output Power Curves ......................................................................................................................................................... 22
Figure 7. Receiver Block Diagram .................................................................................................................................................... 23
Figure 8. AGC Thresholds Settings .................................................................................................................................................. 24
Figure 9. RSSI Dynamic Curve ......................................................................................................................................................... 28
Figure 10. Cordic Extraction .............................................................................................................................................................. 28
Figure 11. OOK Peak Demodulator Description ............................................................................................................................... 29
Figure 12. Floor Threshold Optimization ........................................................................................................................................... 30
Figure 13. Bit Synchronizer Description ............................................................................................................................................ 31
Figure 14. FEI Process ..................................................................................................................................................................... 32
Figure 15. Optimized AFC (AfcLowBetaOn=1) ................................................................................................................................. 33
Figure 16. Temperature Sensor Response ....................................................................................................................................... 34
Figure 17. Tx Startup, FSK and OOK ............................................................................................................................................... 37
Rev 5 - June 2011
ADVANCED COMMUNICATIONS & SENSING
Table of contents
6.1.
6.2.
6.3.
6.4.
6.5.
6.6.
6.7.
6.8.
7.1.
7.2.
7.3.
8.1.
8.2.
8.3.
8.4.
9.1.
Configuration and Status Registers........................................................................................................................................... 61
Application Information.............................................................................................................................................................. 76
Packaging Information............................................................................................................................................................... 80
Chip Revisions .......................................................................................................................................................................... 82
Revision History ........................................................................................................................................................................ 83
5.5.5. AES............................................................................................................................................................................... 55
5.5.6. Handling Large Packets................................................................................................................................................ 57
5.5.7. Packet Filtering ............................................................................................................................................................. 57
5.5.8. DC-Free Data Mechanisms .......................................................................................................................................... 59
7.2.1. POR .............................................................................................................................................................................. 76
7.2.2. Manual Reset ................................................................................................................................................................ 77
General Description .......................................................................................................................................................... 61
Common Configuration Registers ..................................................................................................................................... 64
Transmitter Registers ....................................................................................................................................................... 67
Receiver Registers ........................................................................................................................................................... 68
IRQ and Pin Mapping Registers ....................................................................................................................................... 70
Packet Engine Registers .................................................................................................................................................. 72
Temperature Sensor Registers......................................................................................................................................... 75
Test Registers................................................................................................................................................................... 75
Crystal Resonator Specification........................................................................................................................................ 76
Reset of the Chip .............................................................................................................................................................. 76
Reference Design ............................................................................................................................................................. 77
Package Outline Drawing ................................................................................................................................................. 80
Recommended Land Pattern............................................................................................................................................ 80
Thermal Impedance .......................................................................................................................................................... 81
Tape & Reel Specification ................................................................................................................................................ 81
ContinuousDagc ............................................................................................................................................................... 82
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