FPD87346VS National Semiconductor, FPD87346VS Datasheet

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FPD87346VS

Manufacturer Part Number
FPD87346VS
Description
Manufacturer
National Semiconductor
Datasheet

Specifications of FPD87346VS

Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (min)
3V
Operating Supply Voltage (max)
3.6V
Package Type
TQFP
Mounting
Surface Mount
Pin Count
64
Lead Free Status / RoHS Status
Not Compliant

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Manufacturer
Quantity
Price
Part Number:
FPD87346VS
Manufacturer:
NS
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FPD87346VS
Manufacturer:
NS/国半
Quantity:
20 000
© 2003 National Semiconductor Corporation
FPD87346
Low EMI, Low Dynamic Power (SVGA) XGA/WXGA
TFT-LCD Timing Controller with Reduced Swing
Differential Signaling (RSDS
General Description
The FPD87346 is a timing controller that combines an LVDS
single pixel input interface with National’s Reduced Swing
Differential Signaling (RSDS
(SVGA) XGA and Wide XGA resolutions. It resides on the
TFT-LCD panel and provides the data buffering and control
signal generation for (SVGA) XGA, and Wide XGA graphic
modes. The RSDS
toward lowering radiated EMI and reducing system dynamic
power consumption.
This single RSDS
(SVGA) XGA, and Wide XGA panels at 170 Mb/s when using
VESA 60 Hz standard timing.
System Diagram
RSDS
is a trademark of National Semiconductor Corporation
bus conveys the 8-bit color data for
path to the column driver contributes
) output driver interface for
FIGURE 1. Block Diagram of the LCD Module
DS200615
Features
n Reduced Swing Differential Signalling (RSDS
n LVDS single pixel input interface system
n Input clock range from 40 MHz to 85 MHz
n Drives RSDS
n Virtual 8 bit color depth in FRC/Dithering mode
n Single narrow 9-bit differential Source Driver bus
n Ability to drive (SVGA) XGA and Wide XGA TFT-LCD
n Failure detect function in DE mode
n CMOS circuitry operates from a 3.0V–3.6V supply
) Outputs
bus reduces dynamic power, EMI and bus width from
the timing controller
85 MHz clock (Max.)
minimizes width of Source PCB
Systems
Column Drivers at 170 Mb/s with an
PRELIMINARY
October 2003
www.national.com
) digital
20061501

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FPD87346VS Summary of contents

Page 1

... XGA, and Wide XGA panels at 170 Mb/s when using VESA 60 Hz standard timing. System Diagram RSDS ™ trademark of National Semiconductor Corporation © 2003 National Semiconductor Corporation ™ ) Outputs Features n Reduced Swing Differential Signalling (RSDS bus reduces dynamic power, EMI and bus width from ...

Page 2

Block Diagram Functional Description FPD-LINK RECEIVER The LVDS based FPD-Link Receiver inputs video data and control timing through 4-LVDS channels plus clock to provide 24-bit color or 3-LVDS channels can be used for 18-bit color. The video data is converted ...

Page 3

... National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications. inches (millimeters) unless otherwise noted 64-pin TQFP Package Order Number FPD87346VS NS Package Number VEC-64A 2. A critical component is any component of a life ...

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