SAA7118E/V1/M5,557 Trident Microsystems, Inc., SAA7118E/V1/M5,557 Datasheet - Page 52

• Manufacturer Part Number: SAA7118E/V1/M5,557
• Manufacturer: Trident Microsystems, Inc.

Specifications of SAA7118E/V1/M5,557

• Adc/dac Resolution: 9b
• Screening Level: Commercial
• Package Type: LBGA
• Pin Count: 156
• Lead Free Status / RoHS Status: Supplier Unconfirmed

NXP Semiconductors
SAA7118_7
Product data sheet
Where:
The use of the prescaler results in a XACL[5:0] and XC2_1 dependent gain
amplification. The amplification can be calculated according to the equation:
DC gain = (XC2_1 + 1)
It is recommended to use sequence lengths and weights, which results in a 2
amplification, as these amplitudes can be renormalized by the XDCG[2:0] controlled
shifter of the prescaler.
The renormalization range of XDCG[2:0] is 1,
Other amplifications have to be normalized by using the following BCS control circuitry. In
these cases the prescaler has to be set to an overall gain of
sequence of ‘1 + 1 + 1’ (XACL[5:0] = 2 and XC2_1 = 0), XDCG[2:0] must be set to ‘010’,
this equals
value = lower integer of
The use of XACL[5:0] is XPSC[5:0] dependent. XACL[5:0] must be < 2
XACL[5:0] can be used to find a compromise between bandwidth (sharpness) and alias
effects.
Remark: Due to bandwidth considerations XPSC[5:0] and XACL[5:0] can be chosen
differently to the previously mentioned equations or
able to scale in the range from zooming up by factor 3 to downscaling by a factor of
1024
Figure 37
Table 12
than given in
amplification needs to be compensated by the BCS control, according to the equation:
Where:
For example, if XACL[5:0] = 5, XC2_1 = 1, then the DC gain = 10 and the required
XDCG[2:0] = 4.
The horizontal source acquisition timing and the prescaling ratio is identical for both the
luminance path and chrominance path, but the FIR filter settings can be defined differently
in the two channels.
CONT[7:0]
•
•
•
•
•
The range is 1 to 63 (value 0 is not allowed)
Npix_in = number of input pixel, and
Npix_out = number of desired output pixel over the complete horizontal scaler
2
DC gain = (XC2_1 + 1)
8191
XDCG[2:0]
.
shows the recommended prescaler programming. Other programmings, other
and
1
=
4
Table
and the BCS has to amplify the signal to
SATN[7:0]
Figure 38
DC gain
12, may result in better alias suppression, but the resulting DC gain
4
Rev. 07 — 7 July 2008
show some resulting frequency characteristics of the prescaler.
3
XACL[5:0] + (1
=
low integer of
64).
XACL[5:0] + (1
Multistandard video decoder with adaptive comb filter
--------------------------------
DC gain 64
XC2_1)
2
XDCG[2:0]
1
XC2_1)
2
down to
Table
4
3
1
12, as the H-phase scaling is
(SATN[7:0] and CONT[7:0]
128
.
1, e.g. for an accumulation
SAA7118
© NXP B.V. 2008. All rights reserved.
XPSC[5:0].
N
DC gain
52 of 177
----- -
2
1
N