ADV7178KS-REEL Analog Devices Inc, ADV7178KS-REEL Datasheet - Page 21

ADV7178KS-REEL

Manufacturer Part Number
ADV7178KS-REEL
Description
Manufacturer
Analog Devices Inc
Datasheet

Specifications of ADV7178KS-REEL

Adc/dac Resolution
9b
Screening Level
Commercial
Package Type
MQFP
Pin Count
44
Lead Free Status / RoHS Status
Not Compliant
Mode 1: Master Option HSYNC , BLANK , FIELD
Timing Register 0 TR0 = X X X X X 0 1 1
In this mode, the ADV7177/ADV7178 can generate horizontal SYNC and odd/even FIELD signals. A transition of the FIELD input when
HSYNC is low indicates a new frame, that is, vertical retrace. The BLANK signal is optional. When the BLANK input is disabled, the
ADV7177/ADV7178 automatically blank all normally blank lines. Pixel data is latched on the rising clock edge following the timing
signal transitions. Mode 1 is illustrated in Figure 18 (NTSC) and Figure 19 (PAL). Figure 20 illustrates the HSYNC , BLANK , and FIELD
for an odd or even field transition relative to the pixel data.
HSYNC
BLANK
FIELD
PIXEL
DATA
PAL = 12 × CLOCK/2
NTSC = 16 × CLOCK/2
Figure 20. Timing Mode 1 Odd/Even Field Transitions Master/Slave
Rev. C | Page 21 of 44
PAL = 132 × CLOCK/2
NTSC = 122 × CLOCK/2
Cb
Y
Cr
ADV7177/ADV7178
Y

Related parts for ADV7178KS-REEL