MC34911BACR2 Freescale, MC34911BACR2 Datasheet
MC34911BACR2
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MC34911BACR2 Summary of contents
Page 1
... MCU Figure 1. 33911 Simplified Application Diagram * This document contains certain information on a new product. Specifications and information herein are subject to change without notice. © Freescale Semiconductor, Inc., 2009 - 2010. All rights reserved. SYSTEM BASIS CHIP WITH LIN on with limited current DD Device ...
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... Immunity against ISO7637 pulse 3b 2.5 3. Reduce EMC emission level on LIN 4. Improve EMC immunity against RF – target new specification including 3x68 pF 5. Comply with J2602 conformance test 2.0 Initial release MC33911BAC ± 6.0 kV min on the LIN Analog Integrated Circuit Device Data Freescale Semiconductor ...
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... MC33911G5 PRODUCT SPECIFICATIONS Analog Integrated Circuit Device Data Freescale Semiconductor MC33911G5 PRODUCT SPECIFICATIONS PAGES PAGES 33911 3 ...
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... VOLTAGE REGULATOR LOW SIDE CONTROL MODULE HIGH SIDE CONTROL MODULE V SENSE MODULE CHIP TEMPERATURE SENSE MODULE ANALOG INPUT MODULE DIGITAL INPUT MODULE WDCONF VDD AGND LS1 LS2 PGND VS2 HS1 BAT VSENSE L1 L2 LIN Analog Integrated Circuit Device Data Freescale Semiconductor ...
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... Internal Interrupt 10 IRQ 11 & Not Connected Analog Integrated Circuit Device Data Freescale Semiconductor PIN CONNECTIONS * See Recommendation in Table below Figure 3. 33911 Pin Connections Functional Pin Description Formal Name This pin is the receiver output of the LIN interface which reports the state of the bus voltage to the MCU interface. ...
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... This pin can be left opening or connected to any potential ground or power supply Battery voltage sense input. +5.0 V main voltage regulator output pin. Output This pin is the device analog ground connection. section beginning on page 24. Definition ( addition, all Lx inputs (2) (3) (4) Analog Integrated Circuit Device Data Freescale Semiconductor ...
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... Transient input voltage with external component (according to ISO7637-2) (See Figure 4, page 20) VDD Output Current Notes 5. Exceeding voltage limits on specified pins may cause a malfunction or permanent damage to the device. 6. Extended voltage range for programming purpose only. Analog Integrated Circuit Device Data Freescale Semiconductor MAXIMUM RATINGS Symbol V SUP(SS) V SUP(PK ...
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... Freescale’s Package Reflow capability meets Pb-free requirements for JEDEC standard J-STD-020C. For Peak Package Reflow Temperature and Moisture Sensitivity Levels (MSL www.freescale.com, search by part number [e.g. remove prefixes/suffixes and enter the core ID to view all orderable parts. (i.e. MC33xxxD enter 33xxx), and review parametrics. ...
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... This parameter is guaranteed by process monitoring but not production tested. 19. The Flag is set during power up sequence. To clear the flag, a SPI read must be performed. Analog Integrated Circuit Device Data Freescale Semiconductor ≤ -40°C ≤ T ≤ 125°C for the 33911 and -40°C ≤ T SUP ...
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... V V 0.0 – 0.9 -150 -250 -350 µA mA 1.5 – 8.0 -0.3 – – Analog Integrated Circuit Device Data Freescale Semiconductor ...
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... PULSE WIDTH MODULATION INPUT PIN (PWMIN) Low-state Input Voltage High-state Input Voltage Pull-up current 0 V < V < 3 Analog Integrated Circuit Device Data Freescale Semiconductor STATIC ELECTRICAL CHARACTERISTICS ≤ -40°C ≤ T ≤ 125°C for the 33911 and -40°C ≤ T SUP A Symbol Min ...
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... V V +2.0 – V +5.0 SUP SUP V 2.0 – – 140 160 180 °C – 10 – °C = 150°C. J Analog Integrated Circuit Device Data Freescale Semiconductor . . ...
Page 13
... Watchdog timing period calculation formula: t 37. These limits have been defined after laboratory characterization on 3 lots and 30 samples. These tighten limits could not be guaranteed by production test. Analog Integrated Circuit Device Data Freescale Semiconductor ≤ -40°C ≤ T ≤ 125°C for the 33911 and -40°C ≤ T SUP A ...
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... A = 25°C under nominal A Min Typ Max Unit 5.15 5.25 5.35 mV -30 - -30 -12 -0.35 – 0.0 – 0.35 V 0.0 – 0 -0.8 – -0.3 – – µA V 5.0 6.0 400 mV Analog Integrated Circuit Device Data Freescale Semiconductor ...
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... Node has to sustain the current that can flow under this condition. Bus must remain operational under this condition. 42. This parameter is 100% tested on an Automatic Tester. However, since it has not been monitored during reliability stresses, Freescale does not guarantee this parameter during the product's life time. ...
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... N/A ns 100 – N/A ns 100 – N – N – N – 40 – ns – 40 – ns 0.0 – 50 0.0 – 0.0 – 75 0.65 1.0 1.35 ms 350 480 900 ns ms 8 108 110 150 205 in kΩ) EXT Analog Integrated Circuit Device Data Freescale Semiconductor ...
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... This parameter is guaranteed by process monitoring but not production tested. 47. This parameter is 100% tested on an Automatic Tester. However, since it has not been monitored during reliability stresses, Freescale does not guarantee this parameter during the product's life time. 48. Delay between turn on or off command (rising edge on CS) and OFF, excluding rise or fall time due to external load. ...
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... V SUP D3 ≤ ≤ SUP D4 ≤ ≤ SUP Figure 6, page 21. ≤ 85°C for the A = 25°C under nominal A Min Typ Max Unit 0.396 — — — — 0.581 0.417 — — — — 0.590 Analog Integrated Circuit Device Data Freescale Semiconductor ...
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... In Stop mode, the delay is measured between the bus wake-up threshold (V page 22. 59. This parameter is guaranteed by process monitoring but not production tested. Analog Integrated Circuit Device Data Freescale Semiconductor ≤ -40°C ≤ T ≤ 125°C for the 33911 and -40°C ≤ T SUP A ...
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... TRANSIENT PULSE 1.0 nF GENERATOR LIN ( NOTE GND AGND Transient Pulse 1.0 nF Generator L1, L2 (Note) 10 kΩ GND V SUP R0 LIN R0 AND C0 COMBINATIONS: • 1.0 KΩ and 1 • 660 Ω and 6.8 nF • 500 Ω and Analog Integrated Circuit Device Data Freescale Semiconductor ...
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... LIN 38.9% V SUP TH REC(MIN) 25. SUP DOM(MIN) t RXD Output of receiving Node 1 t REC_PDF(1) RXD Output of receiving Node 2 Figure 8. LIN Timing Measurements for Slow Slew Rate Analog Integrated Circuit Device Data Freescale Semiconductor t BIT t (MAX) BUS_REC BUS_DOM t (MIN) BUS_REC t REC_PDR(1) t REC_PDR(2) t BIT t (MAX) ...
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... LIN BUS SIGNAL t REC_PDR Figure 9. LIN Receiver Timing 5 DOMINANT LEVEL t WAKE_SLEEP t WL PROP Figure 10. LIN Wake-up Sleep Mode Timing 5 DOMINANT LEVEL t WAKE_STOP t WL PROP Figure 11. LIN Wake-up Stop Mode Timing V SUP BUSWU 3.0 V BUSWU Analog Integrated Circuit Device Data Freescale Semiconductor ...
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... Figure 12. Power On Reset and Normal Request Timeout Timing WSCLKH LEAD SCLK t SISU MOSI UNDEFINED t VALID t SOEN MISO D0 Analog Integrated Circuit Device Data Freescale Semiconductor t NRTOUT t RST PSCLK t WSCLKL t SIH D0 DON’T CARE DON’T CARE Figure 13. SPI Timing Characteristics ELECTRICAL CHARACTERISTICS TIMING DIAGRAMS t LAG D7 DON’ ...
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... Normal Request and Normal mode. To enable PWM control, the MCU must perform a write operation to the High Side Control Register (HSCR) or the Low Side Control Register (LSCR). This pin has an internal 20 μA current pull-up. Analog Integrated Circuit Device Data Freescale Semiconductor ...
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... PWMIN input pin. Both low side switches are protected against overheating. In case of VS1 disconnection and the low sides are still Analog Integrated Circuit Device Data Freescale Semiconductor supplied by V through a load, both low sides will have a BAT VDS voltage equal to the clamping value, as stated in the specification ...
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... GND and over-temperature protected. During Stop mode, the voltage regulator does not operate with its full drive capabilities and the output current is limited. During Sleep mode, the regulator output is completely shut down. Analog Integrated Circuit Device Data Freescale Semiconductor ...
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... NORMAL MODE In Normal mode, all 33911 functions are active and can be controlled by the SPI interface and the PWMIN pin. Analog Integrated Circuit Device Data Freescale Semiconductor OPERATIONAL MODES The VDD regulator is ON and delivers its full current capability external resistor is connected between the WDCONF pin and the Ground, the window watchdog function will be enabled ...
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... Expired V DD Low (>NR NRTOUT ) expired DD TOUT and VSUV = 0 and VSUV = 0 Sleep Command Wake-up (Reset) Wake-Up (Reset) Sleep V Low DD V Low DD Figure 14. Operating Modes and Transitions ) NRTOUT ) TOUT Normal Request Normal SLEEP Command Stop Analog Integrated Circuit Device Data Freescale Semiconductor ...
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... Request and Stop mode. Interrupts are not generated while the RST pin is low. The following is a list of the interrupt sources in Normal and Normal Request modes. Some of these can be masked by writing to the SPI - Interrupt Mask Register (IMR). Analog Integrated Circuit Device Data Freescale Semiconductor Normal Stop Mode Mode Full Full ...
Page 30
... LIN bus. A dominant pulse larger than t followed by a dominant to recessive transition will cause a LIN wake-up. This behavior protects the system from a short to ground bus condition. The bit RXONLY = 1 from LINCR Register disables the LIN wake-up from Stop mode. PROPWL Analog Integrated Circuit Device Data Freescale Semiconductor ...
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... SPI timeout window, the clear operation opens clear operation is performed outside the window, the 33911 will reset the MCU, in the same way as when the watchdog overflows. Analog Integrated Circuit Device Data Freescale Semiconductor FUNCTIONAL DEVICE OPERATIONS OPERATIONAL MODES WINDOW CLOSED WINDOW OPEN ...
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... LINSR (TXDOM,2) (66) (0100) LINSR (LINOT,1) All flags in HSSR IRQ low + ISR (66) are set (0010) HSSR (HS1OP,1) - HSSR (HS1CL,0) All flags in LSSR are IRQ low + ISR (66) set (0011) LSSR (LS1OP,1) LSSR (LS2OP,3) - LSSR (LS1CL,0) LSSR (LS2CL, WDSR (WDTO, 3) WDSR (WDERR, 2) Freescale Semiconductor ...
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... Over-temperature shutdown (with maskable interrupt) • High-voltage shutdown (software maskable) • Cyclic sense Analog Integrated Circuit Device Data Freescale Semiconductor The graph below illustrates the internal chip temp sense obtained per characterization at 3 temperatures with 3 different lots and 30 samples. Temperature Sense Analog Output Voltage ...
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... Over-temperature shutdown (with maskable interrupt) • Active clamp (for driving relays) • High-voltage shutdown (software maskable) The low side switches are controlled by the bit LS1:2 in the Low Side Control Register (LSCR PWMIN VS2 HS1 Table 6, Analog Integrated Circuit Device Data Freescale Semiconductor ...
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... Analog Integrated Circuit Device Data Freescale Semiconductor If both the bits LS1 and PWMLS1 are set in the Low Side Control Register (LSCR), then the LS1 driver is turned on if the PWMIN pin is high and turned off if the PWMIN pin is low. ...
Page 36
... The transmitter is automatically re-enabled once the condition is gone and TXD is high J2602_DEG RXD Short-circuit Detection (LIN Interrupt) The LIN transceiver has a short-circuit detection for the RXD output pin. If the device transmits and in case of a short- VS1 30 K LIN LGND Analog Integrated Circuit Device Data Freescale Semiconductor ...
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... A read of the LIN Status Register (LINSR) with the TXD pin at 5.0 V will clear the bit TXDOM. Analog Integrated Circuit Device Data Freescale Semiconductor FUNCTIONAL DEVICE OPERATIONS OPERATIONAL MODES LIN Receiver Operation Only While in Normal mode, the activation of the RXONLY bit disables the LIN TXD driver ...
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... The main reset conditions are: - Power-On Reset (POR): the level at which the logic is reset and BATFAIL flag sets Reset mode CS - Reset done by the RST pin (ext_reset Write Data Latch indicates the end of CS high forces MISO to the high-impedance Analog Integrated Circuit Device Data Freescale Semiconductor ...
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... WDSR - Watchdog Status Register $B WDSR - Watchdog Status Register $C AMUXCR - Analog Multiplexer Control Register $D CFR - Configuration Register IMR - Interrupt Mask Register $E ISR - Interrupt Source Register $F ISR - Interrupt Source Register Analog Integrated Circuit Device Data Freescale Semiconductor SPI REGISTER OVERVIEW VMS LINS HVSE 0 R ...
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... MOD2, MOD1 - Mode Control Bits These write-only bits select the operating mode and allow clearing the watchdog in accordance with Control Bits. HSS LSS MOD2 MOD1 POR - - Table 7 Mode Analog Integrated Circuit Device Data Freescale Semiconductor ...
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... Any access to the MCR or VSR will clear the BATFAIL flag POR Reset has occurred 0 = POR Reset has not occurred Analog Integrated Circuit Device Data Freescale Semiconductor Wake-up Control Register - WUCR This register is used to control the digital wake-up inputs. Writing the WUCR will return the Wake-up Status Register (WUSR) ...
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... Writing to this register returns the High Side Status Register (HSSR). Table 19. High Side Control Register - $6 C3 Write Reset Value Reset Condition RXSHORT TXDOM LINOT PWMHS1 0 HS1 POR, Reset mode, ext_reset, HS1 POR over-temp or (VSOV & HVSE) Analog Integrated Circuit Device Data Freescale Semiconductor ...
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... POR Condition over-temp or (VSOV & HVSE) Analog Integrated Circuit Device Data Freescale Semiconductor PWMLx - PWM input control enable. This write-only bit enables/disables the PWMIN input pin to control the respective low side switch. The corresponding low side switch must be enabled (LSx bit). ...
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... The Windowing function is disabled WDCONF pin resistor missing 0 = WDCONF pin resistor not floating CYST1 CYST0 Interval cyclic sense 100 120 140 160 320 480 640 800 960 1120 WDTO WDERR WDOFF WDWO Analog Integrated Circuit Device Data Freescale Semiconductor (68) ...
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... Analog Integrated Circuit Device Data Freescale Semiconductor Configuration Register - CFR This register controls the cyclic sense timing multiplier. Table 29. Configuration Register - $D Write Reset Value Reset POR, Reset mode Condition CYSX8 - Cyclic Sense Timing x 8. This write-only bit influences the cyclic sense and Forced ...
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... Interrupt Source no interrupt - HS Interrupt (Over-temperature Interrupt (Over-temperature) LIN Wake-up LIN Interrupt (RXSHORT, TXDOM, LIN OT) Voltage Monitor Interrupt ISR3 ISR2 ISR1 ISR0 Priority maskable no interrupt none - highest (High Voltage) - lowest Analog Integrated Circuit Device Data Freescale Semiconductor ...
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... TIMER MISO MOSI SPI SCLK CS MCU ADOUT0 A/D RXD SCI TXD Analog Integrated Circuit Device Data Freescale Semiconductor TYPICAL APPLICATION Interrupt Voltage Regulator Control Module LVI, HVI, HTI, OCI AGND Reset Control Module LVR, HVR, HTR, WD, Low Side Control Module PGND ...
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... MC33911BAC PRODUCT SPECIFICATIONS PAGES MC33911BAC PRODUCT SPECIFICATIONS 33911 48 PAGES Analog Integrated Circuit Device Data Freescale Semiconductor ...
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... VOLTAGE REGULATOR LOW SIDE CONTROL MODULE HIGH SIDE CONTROL MODULE VBAT SENSE MODULE CHIP TEMPERATURE SENSE MODULE ANALOG INPUT MODULE DIGITAL INPUT MODULE WDCONF VDD AGND LS1 LS2 PGND VS2 HS1 VSENSE L1 L2 LIN Analog Integrated Circuit Device Data Freescale Semiconductor ...
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... CS SPI Chip Select 7 ADOUT0 Analog Output Pin 0 8 PWMIN 9 RST Internal Reset I/O Internal Interrupt 10 IRQ Analog Integrated Circuit Device Data Freescale Semiconductor PIN CONNECTIONS Special Configuration Recommended / Mandatory for Marked NC Pins 7 8 Figure 26. 33911 Pin Connections Functional Pin Description Formal Name This pin is the receiver output of the LIN interface which reports the state of the bus voltage to the MCU interface ...
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... These pins are device battery level power supply pins. VS2 is supplying the HS1 driver while VS1 supplies the remaining blocks. Battery voltage sense input. +5.0V main voltage regulator output pin. Output This pin is the device analog ground connection. section. Definition (69 addition, all LX inputs (70) (71) (72) Analog Integrated Circuit Device Data Freescale Semiconductor ...
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... Testing is performed in accordance with the Machine Model (C 77. Testing is performed in accordance with the Charge Device Model, Robotic (C 78. Special configuration recommended / mandatory for marked NC pins. Please refer to the typical application shown on page 88. Analog Integrated Circuit Device Data Freescale Semiconductor MAXIMUM RATINGS Symbol V SUP(SS) V ...
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... Freescale’s Package Reflow capability meets Pb-free requirements for JEDEC standard J-STD-020C. For Peak Package Reflow Temperature and Moisture Sensitivity Levels (MSL www.freescale.com, search by part number [e.g. remove prefixes/suffixes and enter the core ID to view all orderable parts. (i.e. MC33xxxD enter 33xxx), and review parametrics. ...
Page 54
... This parameter is guaranteed by process monitoring but not production tested. 91. The flag is set during power-up sequence. To clear the flag, a SPI read must be performed. Analog Integrated Circuit Device Data Freescale Semiconductor ≤ -40°C ≤ T ≤ 125°C for the 33911 and -40°C ≤ T SUP ...
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... Typ Max 4.75 5.00 5.25 60 110 200 – 0.1 0.25 4.75 5.0 5.25 6 – – 5.0 25 – – 110 125 140 – 10 – 155 170 185 – 10 – Ω. Analog Integrated Circuit Device Data Freescale Semiconductor Unit °C °C °C °C ...
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... PULSE WIDTH MODULATION INPUT PIN (PWMIN) Low-state Input Voltage High-state Input Voltage Pull-up current 0 V < V < 3 Analog Integrated Circuit Device Data Freescale Semiconductor STATIC ELECTRICAL CHARACTERISTICS ≤ -40°C ≤ T ≤ 125°C for the 33911 and -40°C ≤ T SUP A Symbol Min V 4 ...
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... – SUP SUP V 2.0 – – 150 165 180 °C – 10 – °C = 150° Analog Integrated Circuit Device Data Freescale Semiconductor . ...
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... Analog Multiplexer input disconnected from Lx input pin. 106. Analog Multiplexer input connected to Lx input pin. 107. Watchdog timing period calculation formula: t Analog Integrated Circuit Device Data Freescale Semiconductor ≤ -40°C ≤ T ≤ 125°C for the 33911 and -40°C ≤ T SUP A Symbol ...
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... V SUP – – 0.4 0.6 – – 0.475 0.5 0.525 – – 0.175 – – SUP – 1.1 1.4 – 1 kΩ 150 165 180 °C – 10 – °C Analog Integrated Circuit Device Data Freescale Semiconductor ...
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... EXT Notes 110. This parameter is guaranteed by process monitoring but not production tested. 111. Watchdog timing period calculation formula: t Analog Integrated Circuit Device Data Freescale Semiconductor ≤ -40°C ≤ T ≤ 125°C for the 33911 and -40°C ≤ T SUP A Symbol f SPIOP ...
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... N/A μs 4.0 — — (114), (115) 0.396 — — — — 0.581 (114), (116) μs 0.417 — — μs — — 0.590 Analog Integrated Circuit Device Data Freescale Semiconductor ...
Page 62
... In Stop mode, the delay is measured between the bus wake-up threshold (V 122. This parameter is guaranteed by process monitoring but not production tested. Analog Integrated Circuit Device Data Freescale Semiconductor ≤ -40°C ≤ T ≤ 125°C for the 33911 and -40°C ≤ T SUP A ...
Page 63
... TRANSIENT PULSE 1.0nF GENERATOR L1, L2 (NOTE) 10kΩ GND AGND Waveform per ISO 7637-2. Test Pulses 1, 2, 3a, 3b. V SUP R0 LIN R0 AND C0 COMBINATIONS: • 1.0 KΩ and 1 • 660 Ω and 6.8 nF • 500 Ω and Analog Integrated Circuit Device Data Freescale Semiconductor ...
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... MIN DOM 61.6% V SUP LIN 40.0% V SUP 25.1% V SUP t - MAX DOM RXD t RDOM Figure 31. LIN Timing Measurements for Slow Slew Rate Analog Integrated Circuit Device Data Freescale Semiconductor t BIT (MAX) t (MIN) BUS_REC t - MAX REC 74.4% V SUP 60.0% V SUP 42.2% V SUP t - MIN ...
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... Figure 32. LIN Receiver Timing 0.4 V SUP DOMINANT LEVEL PROP WAKE Figure 33. LIN Wake-up Sleep Mode Timing 0.4VSUP 0.4 V SUP Dominant Level Dominant level t PROPWL TpropWL Figure 34. LIN Wake-up Stop Mode Timing V SUP t WAKE Twake Analog Integrated Circuit Device Data Freescale Semiconductor ...
Page 66
... Figure 35. Power On Reset and Normal Request Timeout Timing WSCLKH LEAD SCLK t SISU MOSI UNDEFINED t VALID t SOEN MISO D0 Analog Integrated Circuit Device Data Freescale Semiconductor t NRTOUT t RST PSCLK t WSCLKL t SIH D0 DON’T CARE DON’T CARE Figure 36. SPI Timing Characteristics ELECTRICAL CHARACTERISTICS TIMING DIAGRAMS t LAG D7 DON’ ...
Page 67
... INTERRUPT (IRQ) The IRQ pin is a digital output used to signal events or faults to the MCU while in Normal and Normal Request mode or to signal a wake-up from Stop mode. This active low output or DD Analog Integrated Circuit Device Data Freescale Semiconductor ...
Page 68
... Lx pins are scaled down by a selectable internal voltage divider and can be routed to the ADOUT0 output through the analog multiplexer. Analog Integrated Circuit Device Data Freescale Semiconductor FUNCTIONAL DESCRIPTION FUNCTIONAL PIN DESCRIPTION Note input is selected in the analog multiplexer, it will be disabled as a digital input and remains disabled in low- power mode ...
Page 69
... The 33911 provides a LIN 2.0 compatible LIN physical layer interface with selectable slew rate and various diagnostic features. High Side Drivers HS1 Low Side Driver LS1 - LS2 Voltage Regulator VDD LIN Physical Layer Interface LIN Drivers Analog Integrated Circuit Device Data Freescale Semiconductor ...
Page 70
... NORMAL MODE In Normal mode, all 33911 functions are active and can be controlled by the SPI interface and the PWMIN pin. Analog Integrated Circuit Device Data Freescale Semiconductor OPERATIONAL MODES The VDD regulator is ON and delivers its full current capability external resistor is connected between the WDCONF pin and the Ground, the window watchdog function will be enabled ...
Page 71
... LOW DD V HIGH AND DD RESET DELAY (t RST RESET V LOW DD WD FAILED V LOW (>t ) EXPIRED DD NRTOUT AND VSUV = 0 SLEEP COMMAND WAKE-UP (RESET) SLEEP V LOW DD Figure 38. Operating Modes and Transitions ) NRTOUT ) EXPIRED NORMAL REQUEST NORMAL STOP Analog Integrated Circuit Device Data Freescale Semiconductor ...
Page 72
... Normal Request modes, some of those can be masked by writing to the SPI-Interrupt Mask Register (IMR). Low-voltage Interrupt The low-voltage interrupt signals when the supply line (VS1) voltage drops below the VSUV threshold ( Analog Integrated Circuit Device Data Freescale Semiconductor Normal Request Mode Normal Mode Full Full (123) ...
Page 73
... While in the low-power mode the 33911 monitors the activity on the LIN bus. A dominant pulse larger than t followed by a dominant to recessive transition will cause a LIN wake-up. This behavior protects the system from a short- to ground bus condition. PROPWL Analog Integrated Circuit Device Data Freescale Semiconductor ...
Page 74
... SPI timeout window, the clear operation opens clear operation is performed outside the window, the 33911 will reset the MCU, in the same way as when the watchdog overflows. Analog Integrated Circuit Device Data Freescale Semiconductor FUNCTIONAL DEVICE OPERATIONS OPERATIONAL MODES WINDOW CLOSED WINDOW OPEN ...
Page 75
... Sleep And Stop Mode The high side driver can be enabled to operate in Sleep and Stop mode for cyclic sensing. Also see Operating Modes Overview PWMIN VS2 HS1 Table 37, Analog Integrated Circuit Device Data Freescale Semiconductor ...
Page 76
... Both low side drivers are protected against over- temperature. In case of an over-temperature condition both Analog Integrated Circuit Device Data Freescale Semiconductor To protect the device against over-voltage when an inductive load (relay) is turned off, an active clamp will re- enable the low side FET if the voltage on the LS1 or LS2 pin exceeds a certain level ...
Page 77
... This feature will reduce the current consumption in STOP and SLEEP modes. It also improves performance and safe operation. Current Limit (LIN Interrupt) The output low side FET is protected against over-current conditions over-current condition occurs (e.g. LIN bus VS1 30K LIN LGND V ). BUSWU Analog Integrated Circuit Device Data Freescale Semiconductor ...
Page 78
... TXDOM bit in the LINSR is set. If the bit LINM is set in the IMR an Interrupt IRQ will be generated. Analog Integrated Circuit Device Data Freescale Semiconductor FUNCTIONAL DEVICE OPERATIONS OPERATIONAL MODES The transmitter is automatically re-enabled once TXD is high. ...
Page 79
... The main reset conditions are: - Power-On Reset (POR): level at which the logic is reset and BATFAIL flag sets Reset mode CS - Reset done by the RST pin (ext_reset Write Data Latch indicates the end CS) high forces MISO to the high-impedance Analog Integrated Circuit Device Data Freescale Semiconductor ...
Page 80
... WDSR - Watchdog Status Register $B WDSR - Watchdog Status Register $C AMUXCR - Analog Multiplexer Control Register $D CFR - Configuration Register IMR - Interrupt Mask Register $E ISR - Interrupt Source Register $F ISR - Interrupt Source Register Analog Integrated Circuit Device Data Freescale Semiconductor SPI REGISTER OVERVIEW VMS LINS HVSE LINPE R ...
Page 81
... This write-only bit enables/disables the 30 resistor in STOP and SLEEP modes. This bit also controls the LIN bus wake-up threshold LIN pull-up resistor enabled 0 = LIN pull-up resistor disabled HSS LSS HVSE LINPE MOD2 MOD1 POR POR - - LIN pull-up kΩ Analog Integrated Circuit Device Data Freescale Semiconductor ...
Page 82
... BATFAIL - Battery Fail Flag. This read-only bit is set during power-up and indicates that the 33911 had a Power On Reset (POR). Analog Integrated Circuit Device Data Freescale Semiconductor Any access to the MCR or Voltage Status Register (VSR) will clear the BATFAIL flag POR Reset has occurred ...
Page 83
... This read-only bit signals an over-current condition occurred on the LIN pin. The LIN driver is not shut down but an IRQ is generated. To clear this bit, it must be read after the condition is gone LIN over-current shutdown 0 = None RXSHORT TXDOM LINOT LINOC Analog Integrated Circuit Device Data Freescale Semiconductor ...
Page 84
... HS1 in current limitation (or thermal shutdown Normal Analog Integrated Circuit Device Data Freescale Semiconductor Low Side Control Register - LSCR This register controls the operation of the low side drivers. Writing the Low Side Control Register (LSCR) will also return the Low Side Status Register (LSSR) ...
Page 85
... No cyclic sense 0 1 20ms 1 0 40ms 1 1 60ms 0 0 80ms 0 1 100ms 1 0 120ms 1 1 140ms 0 1 160ms 1 0 320ms 1 1 480ms 0 0 640ms 0 1 800ms 1 0 960ms 1 1 1120ms WDTO WDERR WDOFF WDWO Analog Integrated Circuit Device Data Freescale Semiconductor ...
Page 86
... Voltage is internally clamped to VDD Analog divider Analog divider: 3.6 (typ.) Analog Integrated Circuit Device Data Freescale Semiconductor MXx - Analog Multiplexer Input Select These write-only bits selects which analog input is multiplexed to the ADOUT0 pin according to When disabled or when in Stop or Sleep mode, the output buffer is not powered and the ADOUT0 output is left floating to achieve lower current consumption ...
Page 87
... Lx Wake-up from Stop mode Interrupt (Over-temperature Interrupt (Over-temperature) LIN Interrupt (RXSHORT, TXDOM, LIN OT, LIN OC) or LIN Wake-up Voltage Monitor Interrupt - over-voltage interrupt. SUP ISR3 ISR2 ISR1 ISR0 Priority maskable no interrupt none highest (High-voltage) Forced Wake-up lowest Analog Integrated Circuit Device Data Freescale Semiconductor ...
Page 88
... Pin 15, 16, 20 GND Pin 11 open (floating) Pin 24 = open (floating) or VS2 Pin 28 = this pin is not internally connected and may be used for PCB routing optimization. V BAT LS1 HB Type Relay LS2 PGND Motor Output R1 HS1 VSENSE LIN LIN C5 Analog Integrated Circuit Device Data Freescale Semiconductor ...
Page 89
... Important For the most current revision of the package, visit Available Documentation column select Packaging Information. Analog Integrated Circuit Device Data Freescale Semiconductor PACKAGING PACKAGE DIMENSIONS www.Freescale.com and select Documentation, then under AC SUFFIX (PB-FREE) 32-PIN LQFP 98ASH70029A REVISION D PACKAGING PACKAGE DIMENSIONS 33911 ...
Page 90
... IMPORTANT FOR THE MOST CURRENT REVISION OF THE PACK- AGE, VISIT WWW.FREESCALE.COM AND SELECT DOCUMENTA- 33911 90 AC SUFFIX (PB-FREE) 32-PIN LQFP 98ASH70029A REVISION D Analog Integrated Circuit Device Data Freescale Semiconductor ...
Page 91
... Side Pins (LS1 and temperature Shutdown / TXD Stuck At Dominant / RXD Lin Physical SPI Protocol, • Updated Freescale form and style 2/2009 • Added explanation for pins Not Connected (NC). 6.0 3/2009 • Changed VBAT_SHIFT and GND_SHIFT maximum from 10% to 11.5% for both parameters on page 14. ...
Page 92
... Freescale Semiconductor was negligent regarding the design or manufacture of the part. Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc ...