MC33910G5AC Freescale, MC33910G5AC Datasheet - Page 72

• Manufacturer Part Number: MC33910G5AC
• Manufacturer: Freescale

Specifications of MC33910G5AC

• Turn Off Delay Time: 10us
• Number Of Drivers: 2
• Operating Temperature (min): -40C
• Operating Temperature (max): 125C
• Operating Temperature Classification: Automotive
• Lead Free Status / RoHS Status: Compliant

voltage monitoring will issue a VDDOT Flag independently of
the V
Window Watchdog Overflow
window is open, the 33910 will detect a MCU software
runaway and will reset the microcontroller.
Wake-up From Sleep Mode
hence all wake-up requests from Sleep mode require a
power-up/reset sequence.
External Reset
device to a safe state (same as Reset mode) for as long as
this pin is held low. The RST pin must be held low long
enough to pass the internal glitch filter and get recognized by
the internal reset circuit. This functionality is also active in
Stop mode.
considered.
WAKE-UP CAPABILITIES
Stop) only wake-up sources can bring the device into Normal
mode operation.
interrupt, while in Sleep mode the wake-up is performed by
activating the 5.0 V regulator and resetting the MCU. In both
cases the MCU can detect the wake-up source by accessing
the SPI registers. There is no specific SPI register bit to signal
a CS wake-up or external reset. If necessary this condition is
detected by excluding all other possible wake-up sources.
Wake-up From Wake-up Input (L1) With Cyclic Sense
Disabled
external switches and wake-up the MCU (in Sleep or Stop
mode).
input, the wake-up control register (WUCR) must be
configured with L1WE input enabled. The wake-up input
state is read through the wake-up status register (WUSR).
before entering Low Power mode will disable the wake-up
capability of the L1 input.
Wake-up From Wake-up Input (L1) With Cyclic Sense
Timer Enabled
period if on the wake-up input lines (L1) a state change
occurs. The HSx switch is activated in Sleep or Stop modes
from an internal timer. Cyclic sense and force wake-up are
exclusive. If cyclic sense is enabled, the force wake-up can
not be enabled.
Analog Integrated Circuit Device Data
Freescale Semiconductor
If the watchdog counter is not properly serviced while its
During Sleep mode, the 5.0 V regulator is not active,
The 33910 has a bidirectional reset pin which drives the
After the RST pin is released, there is no extra
Once entered in to one of the low-power modes (Sleep or
In Stop mode, a wake-up is signaled to the MCU as an
The wake-up line is dedicated to sense state changes of
In order to select and activate direct wake-up from the L1
L1 input is also used to perform cyclic-sense wake-up.
Note: Selecting the L1 input in the analog multiplexer
The SBCLIN can wake-up at the end of a cyclic sense
DD
voltage.
t
RST
to be
from the L1 input, before entering in low power modes (Stop
or Sleep modes), the following SPI set-up has to be
performed:
Forced Wake-up
predetermined time spent in Sleep or Stop mode. Cyclic
sense and forced wake-up are exclusive. If forced wake-up is
enabled, the cyclic sense can not be enabled.
has to be sent before entering in Low Power modes:
CS Wake-up
wake-up. The CS wake-up does not generate an interrupt
and is not reported on SPI.
LIN Wake-up
activity on the LIN bus. A dominant pulse larger than t
followed by a dominant to recessive transition will cause a
LIN wake-up. This behavior protects the system from a short-
to-ground bus condition.
RST Wake-up
RST pin is held low long enough to pass the internal glitch
filter. Then, the 33910 will change to Normal Request or
Normal modes depending on the WDCONF pin
configuration. The RST wake-up does not generate an
interrupt and is not reported via SPI.
configured:
configured:
In order to select and activate the cyclic sense wake-up
• In WUCR: select the L1 input to WU-enable.
• In HSCR: enable HSx.
• In TIMCR: select the CS/WD bit and determine the
• Perform Goto Sleep/Stop command.
The 33910 can wake-up automatically after a
To determine the wake-up period, the following SPI set-up
• In TIMCR: select the CS/WD bit and determine the Low
• In HSCR: the HSx bit must be disabled.
While in Stop mode, a rising edge on the CS will cause a
While in the low power modes the 33910 monitors the
While in Stop mode, the 33910 can wake-up when the
From Stop mode, the following wake-up events can be
• Wake-up from L1 input without cyclic sense
• Cyclic sense wake-up inputs
• Force wake-up
• CS wake-up
• LIN wake-up
• RST wake-up
From Sleep mode, the following wake-up events can be
• Wake-up from L1 input without cyclic sense
• Cyclic sense wake-up inputs
• Force wake-up
• LIN wake-up
cyclic sense period with CYSTx bits.
Power mode period with CYSTx bits.
FUNCTIONAL DEVICE OPERATIONS
OPERATIONAL MODES
PROPWL
33910
72