MC34910BAC Freescale, MC34910BAC Datasheet

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MC34910BAC

Manufacturer Part Number
MC34910BAC
Description
Manufacturer
Freescale
Datasheet

Specifications of MC34910BAC

Turn Off Delay Time
10us
Number Of Drivers
2
Operating Temperature (min)
-40C
Lead Free Status / RoHS Status
Compliant

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MC34910BAC
Manufacturer:
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MC34910BACR2
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Freescale Semiconductor
Advance Information
* This document contains certain information on a new product.
Specifications and information herein are subject to change without notice.
© Freescale Semiconductor, Inc., 2009 - 2010. All rights reserved.
LIN System Basis Chip with High
Side Drivers
System Basis Chip (SBC), combining many frequently used functions
in an MCU based system, plus a Local Interconnect Network (LIN)
transceiver. The 33910 has a 5.0 V, 50 mA/60 mA low dropout
regulator with full protection and reporting features. The device
provides full SPI readable diagnostics and a selectable timing
watchdog for detecting errant operation. The LIN Protocol Specification
2.0 and 2.1 compliant LIN transceiver has waveshaping circuitry that
can be disabled for higher data rates.
modulated (PWM) are implemented to drive small loads. One high
voltage input is available for use in contact monitoring, or as external
wake-up input. This input can be used as high voltage Analog Input.
The voltage on this pin is divided by a selectable ratio and available via
an analog multiplexer.
available), Sleep (V
sense and forced wake-up), and Stop (V
capability, wake-up via CS, LIN bus, wake-up inputs, cyclic sense,
forced wake-up and external reset).
SAEJ2602-2.
Features
The 33910G5/BAC is a Serial Peripheral Interface (SPI) controlled
Two 50 mA/60 mA high side switches with optional pulse-width
The 33910 has three main operating modes: Normal (all functions
The 33910 is compatible with LIN Protocol Specification 2.0, 2.1, and
• Full-duplex SPI interface at frequencies up to 4.0 MHz
• LIN transceiver capable of up to 100 kbps with wave shaping
• Two 50 mA/60 mA high side switches
• One high voltage analog/logic Input
• Configurable window watchdog
• 5.0 V low drop regulator with fault detection and low voltage reset
• Switched/protected 5.0 V output (used for Hall sensors)
• Pb-free packaging designated by suffix code AC
(LVR) circuitry
DD
off, wake-up via LIN, wake-up inputs (L1), cyclic
V
BAT
Figure 1. 33910 Simplified Application Diagram
MCU
DD
on with limited current
VS1
VS2
VDD
PWMIN
ADOUT0
MOSI
MISO
SCLK
CS
RXD
TXD
IRQ
RST
33910
WDCONF
VSENSE
HVDD
HS1
HS2
LIN
L1
MC33910G5AC/R2
MC34910G5AC/R2
* See Page 2 for Device Variations
MC33910BAC/R2
MC34910BAC/R2
LIN INTERFACE
Device
SYSTEM BASIS CHIP WITH LIN
ORDERING INFORMATION
AC SUFFIX (Pb-FREE)
2
ND
98ASH70029A
Document Number: MC33910
32-PIN LQFP
33910
GENERATION
- 40°C to 125°C
- 40°C to 125°C
-40°C to 85°C
-40°C to 85°C
Temperature
Range (T
Rev. 8.0, 3/2010
A
)
Package
32-LQFP

Related parts for MC34910BAC

MC34910BAC Summary of contents

Page 1

... This document contains certain information on a new product. Specifications and information herein are subject to change without notice. © Freescale Semiconductor, Inc., 2009 - 2010. All rights reserved. on with limited current DD MC33910G5AC/R2 MC34910G5AC/R2 MC33910BAC/R2 MC34910BAC/R2 * See Page 2 for Device Variations 33910 VSENSE VS1 HS1 VS2 L1 ...

Page 2

... Table 1. This specification support the following products Device Temperature MC33910G5AC/ 125°C MC34910G5AC/ 85°C MC33910BAC/ 125°C MC34910BAC/ 85°C 33910 2 DEVICE VARIATIONS The 33910BAC data sheet is within Product Specifications Pages Generation 1. Increase ESD GUN IEC61000-4-2 (gun test contact with 150 pF, 330 Ω ...

Page 3

... MC33910G5 PRODUCT SPECIFICATIONS Analog Integrated Circuit Device Data Freescale Semiconductor MC33910G5 PRODUCT SPECIFICATIONS PAGES PAGES 33910 3 ...

Page 4

... VS1 VOLTAGE REGULATOR 5.0 V OUTPUT MODULE HIGH SIDE CONTROL MODULE V SENSE MODULE CHIP TEMPERATURE SENSE MODULE ANALOG INPUT MODULE DIGITAL INPUT MODULE WDCONF VDD AGND PGND HVDD VS2 HS1 VS2 HS2 BAT VSENSE L1 LIN Analog Integrated Circuit Device Data Freescale Semiconductor ...

Page 5

... Internal Reset I/O Internal Interrupt 10 IRQ 11 NC Not Connected Analog Integrated Circuit Device Data Freescale Semiconductor PIN CONNECTIONS * See Recommendation in Table below Figure 3. 33910 Pin Connections Functional Pin Description. Formal Name This pin is the receiver output of the LIN interface which reports the state of the bus voltage to the MCU interface ...

Page 6

... This pin can be left opening or connected to any potential ground or power supply Battery voltage sense input. +5.0 V switchable supply output pin. Output +5.0 V main voltage regulator output pin. Output This pin is the device analog ground connection. Definition ( addition, L1 input can be (2) (3) (4) (5) Analog Integrated Circuit Device Data Freescale Semiconductor ...

Page 7

... Transient input voltage with external component (according to ISO7637-2) (See Figure ) VDD Output Current Notes 6. Exceeding voltage limits on specified pins may cause a malfunction or permanent damage to the device. 7. Extended voltage range for programming purpose only. Analog Integrated Circuit Device Data Freescale Semiconductor MAXIMUM RATINGS Symbol V SUP(SS) V SUP(PK ...

Page 8

... Freescale’s Package Reflow capability meets Pb-free requirements for JEDEC standard J-STD-020C. For Peak Package Reflow Temperature and Moisture Sensitivity Levels (MSL www.freescale.com, search by part number [e.g. remove prefixes/suffixes and enter the core ID to view all orderable parts. (i.e. MC33xxxD enter 33xxx), and review parametrics. ...

Page 9

... This parameter is guaranteed by process monitoring but not production tested. 20. The Flag is set during power up sequence. To clear the flag, a SPI read must be performed. Analog Integrated Circuit Device Data Freescale Semiconductor ≤ -40°C ≤ T ≤ 125°C for the 33910 and -40°C ≤ T SUP ...

Page 10

... V 4.75 5.0 5.25 6 – – 25 – – – – 80 – – 50 °C 90 115 140 – 13 – °C 150 170 190 °C – 13 – °C % -2.0 – 2 – 160 300 mV – – – – 20 Analog Integrated Circuit Device Data Freescale Semiconductor ...

Page 11

... PULSE WIDTH MODULATION INPUT PIN (PWMIN) Low-state Input Voltage High-state Input Voltage Pull-up current 0 V < V < 3 Analog Integrated Circuit Device Data Freescale Semiconductor STATIC ELECTRICAL CHARACTERISTICS ≤ -40°C ≤ T ≤ 125°C for the 33910 and -40°C ≤ T SUP A Symbol Min V 4 ...

Page 12

... V 2.0 2.5 3.0 V 3.0 3.5 4.0 V 0.4 0.8 1.4 µA -10 – 10 800 1300 2000 kΩ 0.95 1.0 1.05 3.42 3.6 3.78 mV -80 6.0 80 -22 2 100 104 96 100 104 = 150°C. J Analog Integrated Circuit Device Data Freescale Semiconductor . ...

Page 13

... Watchdog timing period calculation formula: t 36. These limits have been defined after laboratory characterization on 3 lots and 30 samples. These tighten limits could not be guaranteed by production test. Analog Integrated Circuit Device Data Freescale Semiconductor ≤ -40°C ≤ T ≤ 125°C for the 33910 and -40°C ≤ T SUP A ...

Page 14

... V SUP – – 0.4 V SUP 0.6 – – V SUP 0.475 0.5 0.525 V SUP – – 0.175 0.4 1 11.5% V BAT 0 11.5% V BAT Analog Integrated Circuit Device Data Freescale Semiconductor ...

Page 15

... Over-temperature Shutdown Hysteresis Notes 40. This parameter is 100% tested on an Automatic Tester. However, since it has not been monitored during reliability stresses, Freescale does not guarantee this parameter during the product's life time. 41. When over-temperature shutdown occurs, the LIN bus goes in recessive state and the flag LINOT in LINSR is set. ...

Page 16

... N/A ns 100 – N/A ns 100 – N – N – N – 40 – ns – 40 – ns 0.0 – 50 0.0 – 0.0 – 75 0.65 1.0 1.35 ms 350 480 900 ns ms 8 108 110 150 205 in kΩ) EXT Analog Integrated Circuit Device Data Freescale Semiconductor ...

Page 17

... This parameter is guaranteed by process monitoring but not production tested. 45. This parameter is 100% tested on an Automatic Tester. However, since it has not been monitored during reliability stresses, Freescale does not guarantee this parameter during the product's life time. 46. Delay between turn on or off command (rising edge on CS) and OFF, excluding rise or fall time due to external load. ...

Page 18

... SUP D3 ≤ ≤ SUP D4 ≤ ≤ SUP Figure 6. ≤ 85°C for the A = 25°C under nominal A Min Typ Max Unit 0.396 — — — — 0.581 0.417 — — — — 0.590 Analog Integrated Circuit Device Data Freescale Semiconductor ...

Page 19

... In Stop mode, the delay is measured between the bus wake-up threshold (V 57. This parameter is guaranteed by process monitoring but not production tested. Analog Integrated Circuit Device Data Freescale Semiconductor ≤ -40°C ≤ T ≤ 125°C for the 33910 and -40°C ≤ T SUP A ...

Page 20

... TIMING DIAGRAMS TRANSIENT PULSE 1.0 nF GENERATOR LIN ( NOTE GND AGND Transient Pulse 1.0 nF Generator L1 (Note) 10 kΩ GND V SUP R0 LIN R0 AND C0 COMBINATIONS: • 1.0 KΩ and 1 • 660 Ω and 6.8 nF • 500 Ω and Analog Integrated Circuit Device Data Freescale Semiconductor ...

Page 21

... LIN 38.9% V SUP TH REC(MIN) 25. SUP DOM(MIN) t RXD Output of receiving Node 1 t REC_PDF(1) RXD Output of receiving Node 2 Figure 8. LIN Timing Measurements for Slow Slew Rate Analog Integrated Circuit Device Data Freescale Semiconductor t BIT t (MAX) BUS_REC BUS_DOM t (MIN) BUS_REC t REC_PDR(1) t REC_PDR(2) t BIT t (MAX) ...

Page 22

... LIN BUS SIGNAL t REC_PDR Figure 9. LIN Receiver Timing 5 DOMINANT LEVEL t WAKE_SLEEP t WL PROP Figure 10. LIN Wake-up Sleep Mode Timing 5 DOMINANT LEVEL t WAKE_STOP t WL PROP Figure 11. LIN Wake-up Stop Mode Timing V SUP BUSWU 3.0 V BUSWU Analog Integrated Circuit Device Data Freescale Semiconductor ...

Page 23

... Figure 12. Power On Reset and Normal Request Timeout Timing WSCLKH LEAD SCLK t SISU MOSI UNDEFINED t VALID t SOEN MISO D0 Analog Integrated Circuit Device Data Freescale Semiconductor t NRTOUT t RST PSCLK t WSCLKL t SIH D0 DON’T CARE DON’T CARE Figure 13. SPI Timing Characteristics ELECTRICAL CHARACTERISTICS TIMING DIAGRAMS t LAG D7 DON’ ...

Page 24

... This digital input can control the high sides drivers in Normal Request and Normal mode. To enable PWM control, the MCU must perform a write operation to the High Side Control Register (HSCR). This pin has an internal 20 μA current pull-up. Analog Integrated Circuit Device Data Freescale Semiconductor ...

Page 25

... SPI and used for wake-up when 33910 is in low power mode or used as analog Analog Integrated Circuit Device Data Freescale Semiconductor input for the analog multiplexer. When used to sense voltage outside the module kohm series resistor must be used on the input ...

Page 26

... GND and over-temperature protected. During Stop mode, the voltage regulator does not operate with its full drive capabilities and the output current is limited. During Sleep mode, the regulator output is completely shut down. Analog Integrated Circuit Device Data Freescale Semiconductor ...

Page 27

... NORMAL MODE In Normal mode, all 33910 functions are active and can be controlled by the SPI interface and the PWMIN pin. Analog Integrated Circuit Device Data Freescale Semiconductor OPERATIONAL MODES The VDD regulator is ON and delivers its full current capability external resistor is connected between the WDCONF pin and the Ground, the window watchdog function will be enabled ...

Page 28

... Expired V DD Low (>NR NRTOUT ) expired DD TOUT and VSUV = 0 and VSUV = 0 Sleep Command Wake-up (Reset) Wake-Up (Reset) Sleep V Low DD V Low DD Figure 14. Operating Modes and Transitions ) NRTOUT ) TOUT Normal Request Normal SLEEP Command Stop Analog Integrated Circuit Device Data Freescale Semiconductor ...

Page 29

... RST pin is low. The following is a list of the interrupt sources in Normal and Normal Request modes. Some of these can be masked by writing to the SPI - Interrupt Mask Register (IMR). Analog Integrated Circuit Device Data Freescale Semiconductor Normal Request Mode Normal Mode Full Full ...

Page 30

... LIN bus. A dominant pulse larger than t followed by a dominant to recessive transition will cause a LIN wake-up. This behavior protects the system from a short to ground bus condition. The bit RXONLY = 1 from LINCR Register disables the LIN wake-up from Stop mode. PROPWL Analog Integrated Circuit Device Data Freescale Semiconductor ...

Page 31

... SPI timeout window, the clear operation opens clear operation is performed outside the window, the 33910 will reset the MCU, in the same way as when the watchdog overflows. Analog Integrated Circuit Device Data Freescale Semiconductor FUNCTIONAL DEVICE OPERATIONS OPERATIONAL MODES WINDOW CLOSED WINDOW OPEN ...

Page 32

... VSR (VSUV,2) (0101 IRQ low + ISR VSR (VDDOT,1) (0101 LINSR, (RXSHORT,3) IRQ low + ISR LINSR (TXDOM,2) (65) (0100) LINSR (LINOT,1) All flags in HSSR IRQ low + ISR (65) are set (0010) HSSR (HS1OP,1) HSSR (HS2OP,3) - HSSR (HS1CL,0) HSSR (HS2CL, WDSR (WDTO, 3) WDSR (WDERR, 2) Freescale Semiconductor ...

Page 33

... Over-temperature shutdown (with maskable interrupt) • High-voltage shutdown (software maskable) • Cyclic sense Analog Integrated Circuit Device Data Freescale Semiconductor The graph below illustrates the internal chip temp sense obtained per characterization at 3 temperatures with 3 different lots and 30 samples. Temperature Sense Analog Output Voltage ...

Page 34

... Slew rate selection • Over-temperature shutdown • Advanced diagnostics The LIN driver is a low side MOSFET with thermal shutdown. An internal pull-up resistor with a serial diode structure is integrated external pull-up components are PWMIN VS2 HSx Table 6, Overview. Analog Integrated Circuit Device Data Freescale Semiconductor ...

Page 35

... If the (DIS_J2602) bit is set to 1, the J2602 feature is disabled and the communication TXD-LIN-RXD works for Analog Integrated Circuit Device Data Freescale Semiconductor LIN Pin The LIN pin offers a high susceptibility immunity level from external disturbance, guaranteeing communication during external disturbance ...

Page 36

... LIN bus line. A dominant level longer than T PROPWL edge will generate a system wake-up (Reset), and will be reported in the Interrupt Source Register (ISR). Also see Figure 10. Analog Integrated Circuit Device Data Freescale Semiconductor followed by a rising Figure 11. followed by a rising ...

Page 37

... The data transfer is only valid if exactly 8 sample clock edges are present during the active (low) phase of Analog Integrated Circuit Device Data Freescale Semiconductor LOGIC COMMANDS AND REGISTERS • MISO — Master-in Slave-out • SCLK— Serial Clock A complete data transfer via the SPI consists of 1 byte ...

Page 38

... MOD2 MOD1 VDDOT BATFAIL VDDOT BATFAIL 0 L1WE - LSR1 LSR0 LINOT 0 LINOT 0 HS2 HS1 HS1OP HS1CL HS1OP HS1CL WD1 WD0 CYST1 CYST0 WDOFF WDWO WDOFF WDWO MX1 MX0 0 0 LINM VMM ISR1 ISR0 ISR1 ISR0 Analog Integrated Circuit Device Data Freescale Semiconductor ...

Page 39

... HSS - High Side Switch Status This read-only bit indicates that one or more bits in the HSSR are set High Side Status bit set 0 = None Analog Integrated Circuit Device Data Freescale Semiconductor HS1CL HS1OP HS2CL HS2OP Figure 22. High Side Status Mode Control Register - MCR ...

Page 40

... Interrupt Status Register (ISR) and then reading the WUSR. The source of the wake-up is only reported on the first WUCR or WUSR access pin high the source of the wake-up pin low, disabled or selected as an analog input. Analog Integrated Circuit Device Data Freescale Semiconductor C0 0 L1WE 1 1 ...

Page 41

... LIN receiver active (Normal mode) or LIN wake- up disabled (Stop mode LIN fully enabled. LSRx - LIN Slew-Rate This write-only bit controls the LIN driver slew-rate in accordance with Table 18. Analog Integrated Circuit Device Data Freescale Semiconductor Table 17. LIN Slew Rate Control LSR1 LSR0 ...

Page 42

... This option is only active if one of the high side switches is enabled when entering in Stop or Sleep mode. Otherwise, a timed wake-up is performed after the period shown in Table 23 WD2 WD1 WD0 CYST2 CYST1 CYST0 - POR 22. This configuration is valid only if WD0 Prescaler Divider Analog Integrated Circuit Device Data Freescale Semiconductor ...

Page 43

... This read-only bit signals that the watchdog pin connected to Ground and therefore disabled. In this case watchdog Analog Integrated Circuit Device Data Freescale Semiconductor timeouts are disabled and the device automatically enters Normal mode out of Reset. This might be necessary for software debugging and for programming the Flash memory. ...

Page 44

... These read-only bits indicate the interrupt source following Table 30 interrupt is pending then all bits are case more than one interrupt is pending, the interrupt VMM sources are handled sequentially multiplex. 1 over-voltage interrupt. SUP ISR3 ISR2 ISR1 ISR0 Analog Integrated Circuit Device Data Freescale Semiconductor ...

Page 45

... Voltage Monitor Interrupt (Low Voltage and VDD over-temperature Forced Wake-up Analog Integrated Circuit Device Data Freescale Semiconductor Interrupt Source no interrupt - HS Interrupt (Over-temperature) - LIN Wake-up LIN Interrupt (RXSHORT, TXDOM, LIN OT) Voltage Monitor Interrupt FUNCTIONAL DEVICE OPERATIONS Priority maskable no interrupt none - highest Reserved ...

Page 46

... Recommended Configuration of the not Connected Pins (NC): Pin 15, 16, 17, 19, 20, 21 GND Pin 11 = open (floating) Pin 28 = this pin is not internally connected and may be used for PCB routing optimization. V BAT HVDD Hall Sensor Supply R1 HS1 HS2 VSENSE R2 L1 LIN LIN C6 Analog Integrated Circuit Device Data Freescale Semiconductor ...

Page 47

... MC33911BAC PRODUCT SPECIFICATIONS Analog Integrated Circuit Device Data Freescale Semiconductor MC33911BAC PRODUCT SPECIFICATIONS PAGES PAGES 33910 47 ...

Page 48

... VS2 VS1 VOLTAGE REGULATOR 5V OUTPUT MODULE HIGH SIDE CONTROL MODULE V SENSE MODULE CHIP TEMPERATURE SENSE MODULE ANALOG INPUT MODULE DIGITAL INPUT MODULE WDCONF VDD AGND PGND HVDD VS2 HS1 VS2 HS2 BAT VSENSE L1 LIN Analog Integrated Circuit Device Data Freescale Semiconductor ...

Page 49

... Bidirectional reset I/O pin - driven low when any internal reset source is asserted. RST is active low. Interrupt output pin, indicating wake-up events from Stop mode or events from Normal and Normal Request modes. IRQ is active low. Output No connect 24 HS2 NC* 21 NC* 20 NC* 19 NC* 18 PGND 17 NC* Definition Analog Integrated Circuit Device Data Freescale Semiconductor ...

Page 50

... External capacitor (1.0 µF < C < 10 µF; 0.1 Ω < ESR < 5.0 Ω) required. 71. External capacitor (2.0 µF < C < 100 µF; 0.1 Ω < ESR < 10 Ω) required. 72. Analog Integrated Circuit Device Data Freescale Semiconductor Functional Pin Description. Formal Name This input pin is for configuration of the watchdog period and allows the Watchdog disabling of the watchdog ...

Page 51

... R ZAP ZAP = 4.0 pF). ZAP Analog Integrated Circuit Device Data Value Unit -0 +0 +0.3 V SUP - 0 +0.3 V SUP V - ±100 - - -150 to 100 Internally Limited A V ± 8000 ±2000 ± 150 ± 750 ± 500 Note 76 = 200 pF, ZAP Freescale Semiconductor ...

Page 52

... Freescale’s Package Reflow capability meets Pb-free requirements for JEDEC standard J-STD-020C. For Peak Package Reflow Temperature and Moisture Sensitivity Levels (MSL www.freescale.com, search by part number [e.g. remove prefixes/suffixes and enter the core ID to view all orderable parts. (i.e. MC33xxxD enter 33xxx), and review parametrics. ...

Page 53

... Unit 5.5 – – – – – – 4 µA – – µA – – – 10 – µA V 1.5 3.0 3.9 – 0.9 – V 5.55 6.0 6.6 – 1.0 – 19.25 20.5 – 1.0 – Analog Integrated Circuit Device Data Freescale Semiconductor ...

Page 54

... This parameter is guaranteed by process monitoring but, not production tested. Specification with external capacitor 1.0 µF < C < 10 µF and 100 mΩ ≤ ESR ≤ 10 Ω. 93. Analog Integrated Circuit Device Data Freescale Semiconductor ≤ -40°C ≤ T ≤ 125°C for the 33910 and -40°C ≤ T SUP ...

Page 55

... A = 25°C under nominal A Typ Max Unit 4.5 4 – 0.9 -250 -350 µA mA – 8.0 – 0 – 0 – 1.0 V – µA – 10 – 0 – 0 µA – 10 µ – 0.8 V – – 2.0 – 0 – 0 µ Freescale Semiconductor ...

Page 56

... Guaranteed by characterization but, not production tested 100. Analog multiplexer input disconnected from L1 input pin. 101. Analog multiplexer input connected to L1 input pin. Analog Integrated Circuit Device Data Freescale Semiconductor ≤ -40°C ≤ T ≤ 125°C for the 33910 and -40°C ≤ T SUP A Symbol ...

Page 57

... Typ Max Unit 20 – 200 k -15 – – 10.5 – mV/K 5.0 5.25 5.5 -30 – -45 – 0.35 – 0.0 – 0.35 V 0.0 – 0 -0.8 – -0.3 – – 0 µA in kΩ) EXT Analog Integrated Circuit Device Data Freescale Semiconductor Ω ...

Page 58

... Parameters guaranteed for 7 104. When Over-temperature shutdown occurs, the LIN bus goes in recessive state and the flag LINOT in LINSR is set. Analog Integrated Circuit Device Data Freescale Semiconductor ≤ -40°C ≤ T ≤ 125°C for the 33910 and -40°C ≤ T SUP A Symbol ...

Page 59

... N/A ns 100 – N/A ns 100 – N – N – N – 40 – ns – 40 – ns 0.0 – 50 0.0 – 0.0 – 75 0.65 1.0 1.35 ms 350 600 900 ns ms 8 108 110 150 205 in kΩ) EXT Analog Integrated Circuit Device Data Freescale Semiconductor ...

Page 60

... Bus load R and C BUS BUS threshold defined at each parameter. See 110. See Figure 28. 111. See Figure 29. Analog Integrated Circuit Device Data Freescale Semiconductor ≤ -40°C ≤ T ≤ 125°C for the 33910 and -40°C ≤ T SUP A Symbol t WUF t STOP ) t NR TOUT (108) ...

Page 61

... Typ Max Unit V / μs — 20 — — 3.0 6.0 - 2.0 — 2 — — 1500 9 0.65 1.0 1.35 kHz — 10 — reaches 3 and the falling edge of the IRQ pin. See Figure Analog Integrated Circuit Device Data Freescale Semiconductor μs μs μs s 11. ...

Page 62

... LGND NOTE: Waveform Per ISO 7637-2. Test Pulses 1, 2, 3a, 3b. Figure 26. Test Circuit for Transient Test Pulses (L1) TXD RXD Figure 27. Test Circuit for LIN Timing Measurements Analog Integrated Circuit Device Data Freescale Semiconductor TIMING DIAGRAMS TRANSIENT PULSE 1.0 nF GENERATOR LIN ( NOTE ...

Page 63

... SUP SUP SUP 38.9% V SUP t - MIN REC t t BUS_REC t RREC (MIN MIN DOM 58.1% V SUP 40.0% V SUP 28.4% V SUP (MIN) BUS_DOM (MAX) (MIN MIN DOM 61.6% V SUP 40.0% V SUP 25.1% V SUP (MIN) BUS_DOM (MAX) Analog Integrated Circuit Device Data Freescale Semiconductor ...

Page 64

... V BUSrec V BUSdom RXD t RX_PDF V LIN_REC LIN VDD V LIN_REC LIN IRQ Analog Integrated Circuit Device Data Freescale Semiconductor LIN BUS SIGNAL t RX_PDR Figure 30. LIN Receiver Timing 0.4 V SUP DOMINANT LEVEL PROP WAKE Figure 31. LIN Wake-up Sleep Mode Timing 0.4 V SUP DOMINANT LEVEL ...

Page 65

... Figure 33. Power On Reset and Normal Request Timeout Timing WSCLKH LEAD SCLK t SISU MOSI UNDEFINED t VALID t SOEN MISO D0 33910 65 t NRTOUT t RST PSCLK t WSCLKL t SIH D0 DON’T CARE DON’T CARE Figure 34. SPI Timing Characteristics t LAG D7 DON’T CARE t SODIS D7 Analog Integrated Circuit Device Data Freescale Semiconductor ...

Page 66

... MASTER IN SLAVE OUT (MISO) The MISO pin sends data to an SPI-enabled MCU digital tri-state output used to shift serial data to the Analog Integrated Circuit Device Data Freescale Semiconductor FUNCTIONAL DESCRIPTION INTRODUCTION include a wake-up capable pin amd a Hall Sensor port supply. An internal voltage regulator provides power to a MCU device ...

Page 67

... GND and over-temperature protected. During Stop mode the voltage regulator does not operate with its full drive capabilities and the output current is limited. During Sleep mode the regulator output is completely shut down. Analog Integrated Circuit Device Data Freescale Semiconductor ...

Page 68

... MCU INTERFACE The 33910 is providing its control and status information through a standard 8-Bit SPI interface. Critical system events such as Low- or High-voltage/Temperature conditions as well Analog Integrated Circuit Device Data Freescale Semiconductor Integrated Supply Analog Circuitry Reset & IRQ Logic HS - PWM Control Analog Output 0 ...

Page 69

... LIN bus, wake inputs) or the MCU side (CS, RST pins). Wake-up from Stop mode will transition the 33910 to Normal Request mode and generates an interrupt except if the wake-up event is a low to high transition on the CS pin or comes from the RST pin. SUP Analog Integrated Circuit Device Data Freescale Semiconductor ...

Page 70

... Sleep Command: Sleep command sent via the SPI Wake-up from Stop mode: L1 state change, LIN bus wake-up, Periodic wake-up, CS rising edge wake-up or RST wake-up. Wake-up from Sleep mode: L1 state change, LIN bus wake-up, Periodic wake-up. Analog Integrated Circuit Device Data Freescale Semiconductor Normal Request Timeout Expired (t V LOW ...

Page 71

... VDD pin has dropped below the reset threshold V the 33910 will issue a reset. In case of over- RSTTH temperature, the voltage regulator will be disabled and the Sleep Mode stop - - - (120) (121) Note Note - - Wake-up Wake-up Wake- VDD - ) RSTTH is continuously monitored DD Analog Integrated Circuit Device Data Freescale Semiconductor ...

Page 72

... If cyclic sense is enabled, the force wake-up can not be enabled. Analog Integrated Circuit Device Data Freescale Semiconductor In order to select and activate the cyclic sense wake-up from the L1 input, before entering in low power modes (Stop or Sleep modes), the following SPI set-up has to be performed: • ...

Page 73

... If both the bits HS1 and PWMHS1 are set in the High Side Control Register (HSCR), then the HS1 driver is turned on if the PWMIN pin is high and turned of if the PWMIN pin is low. This applies to HS2 configuring HS2 and PWMHS2 bits. Analog Integrated Circuit Device Data Freescale Semiconductor ...

Page 74

... Both high side drivers are protected against over- temperature. In case of an over-temperature condition both high side drivers are shut down and the event is latched in the Analog Integrated Circuit Device Data Freescale Semiconductor PWMHSx High Side - Driver charge pump open load detection ...

Page 75

... LINPE bit in the MCR. The bit LINPE also changes the bus wake-up threshold ( In case of a LIN bus short to GND, this feature will reduce the current consumption in Stop and Sleep modes. VS1 30K LIN LGND V ). BUSWU Analog Integrated Circuit Device Data Freescale Semiconductor ...

Page 76

... TXDOM in the LIN status register (LINSR) is set. Analog Integrated Circuit Device Data Freescale Semiconductor FUNCTIONAL DEVICE OPERATIONS OPERATIONAL MODES If the bit LINM is set in the interrupt mask register (IMR) an interrupt IRQ will be generated ...

Page 77

... The main reset conditions are: - Power-On Reset (POR): level at which the logic is reset and BATFAIL flag sets Reset mode CS - Reset done by the RST pin (ext_reset Write Data Latch indicates the end of CS high forces MISO to the high-impedance Analog Integrated Circuit Device Data Freescale Semiconductor ...

Page 78

... AMUXCR - Analog Multiplexer Control Register $D CFR - Configuration Register IMR - Interrupt Mask Register $E ISR - Interrupt Source Register $F ISR - Interrupt Source Register Note: Address $8 and $9 are reserved and must not be used. Analog Integrated Circuit Device Data Freescale Semiconductor SPI REGISTER OVERVIEW VMS LINS ...

Page 79

... This write-only bit enables/disables the 30 kΩ LIN pull-up resistor in Stop and Sleep modes. This bit also controls the LIN bus wake-up threshold LIN pull-up resistor enabled 0 = LIN pull-up resistor disabled HSS LINPE MOD2 MOD1 POR - - Analog Integrated Circuit Device Data Freescale Semiconductor ...

Page 80

... BATFAIL - Battery Fail Flag. This read-only bit is set during power-up and indicates that the 33910 had a power on reset (POR). Analog Integrated Circuit Device Data Freescale Semiconductor Any access to the MCR or voltage status register (VSR) will clear the BATFAIL flag POR Reset has occurred ...

Page 81

... This read-only bit signals an over-current condition occurred on the LIN pin. The LIN driver is not shutdown but an IRQ is generated. To clear this bit, it must be read after the condition is gone LIN over-current shutdown 0 = None RXSHORT TXDOM LINOT LINOC Analog Integrated Circuit Device Data Freescale Semiconductor ...

Page 82

... HSx Open Load detected (or thermal shutdown Normal Analog Integrated Circuit Device Data Freescale Semiconductor HSxCL - High Side Current Limitation This read-only bit indicates that the high side switch is operating in current Limitation mode HSx in current limitation (or thermal shutdown) ...

Page 83

... L1DS - L1 Analog Input Divider Select This write-only bit selects the resistor divider for the L1 analog input. Voltage is internally clamped to VDD Analog divider Analog divider: 3.6 (typ L1DS MX2 MX1 MX0 POR POR, Reset mode or ext_reset Analog Integrated Circuit Device Data Freescale Semiconductor ...

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... MCU. The 5.0 V Regulator over-temperature prewarning interrupt and under-voltage (VSUV) interrupts can not be masked and will always cause an interrupt. Analog Integrated Circuit Device Data Freescale Semiconductor Writing to the interrupt mask register (IMR) will return the ISR. Table 54. ...

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... VDD over-temperature 33910 85 Interrupt Source no interrupt L1 wake-up from Stop mode interrupt (Over-temperature) - LIN interrupt (RXSHORT, TXDOM, LIN OT, LIN OC) or LIN wake-up Voltage monitor interrupt - Priority maskable no interrupt none highest Reserved (High-voltage) Forced wake-up lowest Analog Integrated Circuit Device Data Freescale Semiconductor ...

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... MISO MOSI SPI SCLK CS MCU ADOUT0 A/D RXD SCI TXD A/D Analog Integrated Circuit Device Data Freescale Semiconductor TYPICAL APPLICATIONS Interrupt Voltage Regulator Control Module LVI, HVI, HTI, OCI AGND 5V Output Module Reset Control Module LVR, HVR, HTR, WD, Window Watchdog Module ...

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... PACKAGING PACKAGE DIMENSIONS Important For the most current revision of the package, visit Available Documentation column select Packaging Information. 33910 87 PACKAGING PACKAGE DIMENSIONS www.Freescale.com and select Documentation, then under AC SUFFIX (PB-FREE) 32-PIN LQFP 98ASH70029A REVISION D Analog Integrated Circuit Device Data Freescale Semiconductor ...

Page 88

... Analog Integrated Circuit Device Data Freescale Semiconductor IMPORTANT FOR THE MOST CURRENT REVISION OF THE PACK- AGE, VISIT WWW.FREESCALE.COM AND SELECT DOCUMENTATION, PACKAGE DIMENSIONS (Continued) AC SUFFIX (PB-FREE) 32-PIN LQFP 98ASH70029A REVISION D 33910 88 ...

Page 89

... Changed VBAT_SHIFT and GND_SHIFT maximum from 10% to 11.5% for both parameters on page 13. 7.0 • Combined Complete Data sheet for Part Numbers MC33910BAC and MC34910BAC to the back of this data 3/2010 8.0 sheet. • Changed ESD Voltage for Machine Model from ± 200 to ± 150 ...

Page 90

... Freescale Semiconductor was negligent regarding the design or manufacture of the part. Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc ...

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