MC34912G5AC Freescale, MC34912G5AC Datasheet - Page 88

• Manufacturer Part Number: MC34912G5AC
• Manufacturer: Freescale

Specifications of MC34912G5AC

• Turn Off Delay Time: 10us
• Number Of Drivers: 4
• Operating Temperature (min): -40C
• Lead Free Status / RoHS Status: Compliant

WDERR - Watchdog Error
watchdog resistor. In this condition the watchdog is using the
internal, lower precision timebase. The Windowing function is
disabled.
WDOFF - Watchdog Off
to Ground and therefore disabled. In this case watchdog
timeouts are disabled and the device automatically enters
Normal mode out of Reset. This might be necessary for
software debugging and for programming the Flash memory.
WDWO - Watchdog Window Open
open for clears. The purpose of this bit is for testing. Should
be ignored in case WDERR is High.
Analog Multiplexer Control Register - MUXCR
the divider ration for the Lx input divider.
LXDS - Lx Analog Input Divider Select
analog inputs. Voltage is internally clamped to VDD.
MXx - Analog Multiplexer Input Select
multiplexed to the ADOUT0 pin according to
buffer is not powered and the ADOUT0 output is left floating
to achieve lower current consumption.
88
33912
FUNCTIONAL DEVICE OPERATIONS
LOGIC COMMANDS AND REGISTERS
This read-only bit signals the detection of a missing
1 = WDCONF pin resistor missing
0 = WDCONF pin resistor not floating
This read-only bit signals that the watchdog pin connected
1 = Watchdog is disabled
0 = Watchdog is enabled
This read-only bit signals when the watchdog window is
1 = Watchdog window open
0 = Watchdog window closed
This register controls the analog multiplexer and selects
This write-only bit selects the resistor divider for the Lx
0 = Lx Analog divider: 1
1 = Lx Analog divider: 3.6 (typ.)
These write-only bits selects which analog input is
When disabled or when in Stop or Sleep mode, the output
Table 57. Analog Multiplexer Control Register -$C
Condition
Reset
Reset
Value
Write
LXDS
POR
C3
1
POR, Reset mode or ext_reset
MX2
C2
0
MX1
C1
0
Table
MX0
C0
0
58.
Table 58. Analog Multiplexer Channel Select
Configuration Register - CFR
disable, the cyclic sense timing multiplier, enables/disables
the Current Sense Auto-zero function and selects the gain for
the current sense amplifier.
HVDD - Hall Sensor Supply Enable
sensor supply.
CYSX8 - Cyclic Sense Timing x 8.
shown in
CSAZ - Current Sense Auto-Zero Function Enable
the offset voltage of the current sense amplifier.
CSGS - Current Sense Amplifier Gain Select
amplifier.
MX2
This register controls the Hall Sensor Supply enable/
This write-only bit enables/disables the state of the hall
1 = HVDD on
0 = HVDD off
This write-only bit influences the cyclic sense period as
1 = Multiplier enabled
0 = None
This write-only bit enables/disables the circuitry to lower
1 = Auto-zero function enabled
0 = Auto-zero function disabled
This write-only bit selects the gain of the current sense
1 = 14.5 (typ.)
0 = 30 (typ.)
Table 59. Configuration Register - $D
0
0
0
0
1
1
1
1
Condition
Reset
Value
Reset
Write
Table
MX1
0
0
1
1
0
0
1
1
POR, Reset
ext_reset
mode or
HVDD
55.
C3
0
MX0
Analog Integrated Circuit Device Data
0
1
0
1
0
1
0
1
CYSX8
POR
C2
0
Die Temperature Sensor
Freescale Semiconductor
VSENSE input
CSAZ
POR
C1
Reserved
0
Meaning
Disabled
L1 input
L2 input
L3 input
L4 input
CSGS
POR
C0
0