SC4210AIMSTR Semtech, SC4210AIMSTR Datasheet - Page 7

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SC4210AIMSTR

Manufacturer Part Number
SC4210AIMSTR
Description
Manufacturer
Semtech
Datasheet

Specifications of SC4210AIMSTR

Lead Free Status / RoHS Status
Not Compliant
Using the above values with a constant 3A load gives
80º PM (phase margin) with a unity gain frequency of
2.4MHz; see Figure 3, simulated in P-Spice.
Compensating the SC4210A can be done by modeling
the device in a straight forward fashion using the Control
Loop Block Diagram shown in Figure 1.
Fs
POWER MANAGEMENT
Applications Information (Cont.)
2004 Semtech Corp.
:
(
. 0
26
R
O
10
:
7
)
. 0
26
Z
0
C
3 .
F
S
:
FB
gm
10
:
10
Figure 3.
R
7
:
:
gm
7
C
. 0
Ro
npn
R
s
26
0
8 .
4
Ro
R
s
R
mA
5
10
Zc
V
R
C
npn
R
1
5
7
Zc
3
C
C
s
R
npn
Cc
3
R
. 0
3
26
s (
10
Rc
7
s
Cc
Rc
7
The basic analysis yields a two pole, two zero system.
However, considering a limited bandwidth of the NPN
buffer stage and external N-MOSFET, the system
eventually rolls off due to the third pole at very high
frequencies (10-20MHz). The low ESR ceramic capacitors
push the secondary zero to well above the unity gain
frequency, requiring accurate placement of the dominant
zero for stability.
To adjust the above values, say for an output capacitor
of 1µF ceramic (ESR=1m ), the Rcomp initially should
be decreased by the same multiple as the output
capacitor, i.e. Rcomp = 24k
results yield over 90º of PM at a unity gain frequency of
386kHz; see Figure 4.
Cc
1
R )
3
npn
npn
R
gm
3
Gs
Hs
s
Rc
:
ZL
:
Gs
:
R (
Cc
RL
RL
:
4
s
R
s
1
CL
5
. 0
RL
RL
s
R
CL
1
26
1
CL
) 5
÷ 10 = 2.4k . Simulated
Re
ZL
ZL
10
F
Re
Re
S
sr
7
sr
G
sr
SC4210A
S
npn
www.semtech.com
R
3

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