SLCF8GM2PUI STEC, SLCF8GM2PUI Datasheet - Page 9

• Manufacturer Part Number: SLCF8GM2PUI
• Manufacturer: STEC
• Type: CompactFlashr

Specifications of SLCF8GM2PUI

• Density: 8GByte
• Operating Supply Voltage (typ): 3.3/5V
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Package Type: Not Required
• Mounting: Socket
• Pin Count: 50
• Operating Temperature Classification: Industrial
• Operating Supply Voltage (min): 2.97/4.5V
• Operating Supply Voltage (max): 3.63/5.5V
• Programmable: Yes
• Lead Free Status / RoHS Status: Compliant

SLCFxxx(G)M2PU(I)
Datasheet
A10-A0
(PC Card Memory Mode)
A10-A0
(PC Card I/O Mode)
A2-A0
(True IDE Mode)
-CE1, -CE2
(PC Card Memory Mode)
Card Enable
-CE1, -CE2
(PC Card I/O Mode)
Card Enable
-CS0, -CS1
(True IDE Mode)
-CSEL
(PC Card Memory Mode)
-CSEL
(PC Card I/O Mode)
-CSEL
(True IDE Mode)
-REG
(PC Card Memory Mode
except UDMA protocol
active)
Attribute Memory Select
-DMACK
(PC Card Memory Mode
when UDMA protocol is
active)
-REG
(PC Card I/O Mode except
UDMA protocol active)
DMACK
(PC Card I/O Mode when
UDMA protocol is active)
-DMACK
(True IDE Mode)
I
I
I
I
8, 10, 11,
12, 14,
15, 16,
17, 18,
19, 20
18, 19, 20
7, 32
39
44
61000-05610-108, April 2009
These address lines along with the -REG signal are used to
select the following: the I/O port address registers within the
CF Card, the memory mapped port address registers within
the CF Card, a byte in the CIS and the Configuration Control
and Status Registers.
This signal is the same as the PC Card Memory Mode signal.
In True IDE Mode only, A2:A0 are used to select the one of
eight registers in the Task File. The remaining address lines
should be grounded.
These input signals are used both to select the CF Card and
to indicate to the CF Card whether a byte or a word operation
is being performed. -CE2 always accesses the odd byte of
the word. -CE1 accesses the even byte or the odd byte of the
word depending on A0 and -CE2. A multiplexing scheme
based on A0, -CE1, -CE2 allows 8-bit hosts to access all
data on D0-D7.
This signal is the same as the PC Card Memory Mode signal.
In the True IDE Mode, -CS0 is the chip enable for the task
file registers while -CS1 is used to select the Alternate Status
Register and the CF Card Control Register.
This signal is not used for this mode.
This signal is not used for this mode.
This internally pulled up signal is used to configure the card
as a Master or Slave. When the pin is grounded, the card is
configured as a Master. When the pin is open, the card is
configured as a Slave.
This signal distinguishes between accesses to Common
Memory (high) and Register Attribute Memory (low). In PC
Card Memory Mode, when UDMA protocol is supported by
host and host has enable UDMA on the card, the host shall
keep the –REG signal negated during the execution of any
DMA Command by the device.
This is a DMA Acknowledge signal that is asserted by the
host in response to (-)DMARQ to initiate DMA transfers. In
True IDE Mode, while DMA operations are not active, the
card shall ignore the (-)DMARQ signal, including a floating
condition. If DMA operation is not supported by a True IDE
Mode only host, this signal should be driven high or
connected to VCC by the host. A host that does not support
DMA and implements both PC Card and True IDE modes of
operation need not alter the PC Card mode connections
while in True IDE mode as long as this does not prevent
proper operation all modes
The signal must also be active (low) during I/O Cycles when
the I/O address is on the bus. In PC Card I/O Mode, when
UDMA protocol is support by host and host has enable
UDMA on card, the host shall keep the –REG signal asserted
during the execution of any DMA Command by the device.
Same as (-)DMACK above.
Same as (-)DMACK above.
CompactFlash Card
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