SLCF064J STEC, SLCF064J Datasheet

Page 1

... Available in Commercial and Industrial Operating Temperature Ranges Web: www.simpletech.com GENERAL DESCRIPTION The SimpleTech SLCF064J( Type I CompactFlash Card with 64MB of nonvolatile storage. The cards use a flash memory controller that provides a fully compatible CompactFlash interface for the flash memory. SimpleTech OEM CompactFlash cards are the product of ...

Page 2

... SLCF064J(I) PACKAGE DIMENSIONS AND PIN LOCATIONS CompactFlash Type I Length .......................................... 1.433±.006 in (36.4±0.15 mm) Width .......................................... 1.685±.004 in (42.80±0.10 mm) Thickness (Type I) ........................... .130±.004 in (3.3±0.10 mm) (including Label Area) .063 .002 .130 .004 .040 .003 TOP 1.640 .005 1.685 .004 ...

Page 3

... SLCF064J(I) PACKAGE DIMENSIONS AND PIN LOCATIONS Adapter for CompactFlash Type I and Card Type II (Typical) Length .................. 3.370±.008 in (85.6±0.20 mm) Width .................... 2.126±.004 in (54.0±0.10 mm) Thickness ............ .1968 in max. (5.0 mm max.) (continued) .196 .130 2.126 1.738 .138 Document Part Number 61000-02805-304 July 2004 ...

Page 4

... SLCF064J(I) PIN ASSIGNMENTS PC Card Memory Mode PC Card I/O Mode Pin Signal Pin Pin Num Name Type Num 1 GND Ground 1 2 D03 I D04 I D05 I D06 I D07 I -CE1 A10 - A09 A08 A07 VCC Power 13 14 A06 A05 A04 A03 A02 A01 A00 I 20 ...

Page 5

... SLCF064J(I) PINOUT OF THE PC CARD TO CF ADAPTER Pin PC Card 1 GND 2 D03 3 D04 4 D05 5 D06 6 D07 7 -CE1 8 A10 9 - A09 12 A08 -WE 16 -RDY/-BSY/-IREQ 17 VCC A07 23 A06 24 A05 25 A04 26 A03 27 A02 28 A01 29 A00 30 D00 31 D01 32 D02 33 WP/-IOIS16 34 GND CF Pin PC Card GND 35 D03 ...

Page 6

... SLCF064J(I) SIGNAL DESCRIPTIONS Signal Name Dir BVD2 I/O (PC Card Memory Mode) -SPKR (PC Card I/O Mode) -DASP (True IDE Mode) -CD1, -CD2 O 26, 25 (PC Card Memory Mode) -CD1, -CD2 (PC Card I/O Mode) -CD1, -CD2 (True IDE Mode) D15-D00 I/O 31, 30, 29, 28, (PC Card Memory Mode) ...

Page 7

... SLCF064J(I) SIGNAL DESCRIPTIONS Signal Name Dir -OE I (PC Card Memory Mode) -OE (PC Card I/O Mode) -OE (True IDE Mode) RDY/-BSY O (PC Card Memory Mode) -IREQ (PC Card I/O Mode) INTRQ (True IDE Mode) A10- 10, 11, 12, (PC Card Memory Mode) 14, 15, 16, 17, 18, 19, 20 A10-A0 ...

Page 8

... SLCF064J(I) SIGNAL DESCRIPTIONS Signal Name Dir -CSEL I (PC Card Memory Mode) -CSEL (PC Card I/O Mode) -CSEL (True IDE Mode) -REG I (PC Card Memory Mode) Attribute Memory Select -REG (PC Card I/O Mode) Not Used (True IDE Mode (PC Card Memory Mode) Write Protect ...

Page 9

... SLCF064J(I) SIGNAL DESCRIPTIONS Signal Name Dir -WAIT O (PC Card Memory Mode) -WAIT (PC Card I/O Mode) IORDY (True IDE Mode) GND — (PC Card Memory Mode) GND (PC Card I/O Mode) GND (True IDE Mode) VCC — 13, 38 (PC Card Memory Mode) VCC (PC Card I/O Mode) ...

Page 10

... SLCF064J(I) ABSOLUTE MAXIMUM RATINGS Parameter Voltage on any pin w.r.t. Vss Storage Temperature range RECOMMENDED OPERATING CONDITIONS Parameter Commercial operating temperature Industrial operating temperature VCC voltage PERFORMANCE Item Data Transfer Rate To/From Host Sustained Read Sustained Write RELIABILITY Item Data Write/Erase Endurance ...

Page 11

... SLCF064J(I) DC CHARACTERISTICS-1 temperature parts; VCC=3.3V +5% or -3.6%) Symbol Parameter VIL Input LOW Voltage VIH Input HIGH Voltage VOL Output LOW Voltage VOH Output HIGH Voltage ICC Operating Current Sleep mode Operating ILI Input Leakage Current ILO Output Leakage Current CI/O Input/output Capacitance (Ta=0 to 70° ...

Page 12

... SLCF064J(I) DC CHARACTERISTICS-2 temperature parts; VCC=5V±5%) Symbol Parameter VIL Input LOW Voltage VIH Input HIGH Voltage VOL Output LOW Voltage VOH Output HIGH Voltage ICC Operating Current, VCC=5.0V Sleep mode Operating ILI Input Leakage Current ILO Output Leakage Current CI/O Input/output Capacitance (Ta=0 to 70° ...

Page 13

... SLCF064J(I) AC CHARACTERISTICS temperature parts; VCC=5V±5% or VCC=3.3V +5% or -3.6%) Attribute Memory Read AC Characteristics Item Read Cycle Time Address Access Time Card Enable Access Time Output Enable Access Time Output Disable Time from -CE Output Disable Time from -OE Address Setup Time Output Enable Time from -CE ...

Page 14

... SLCF064J(I) AC CHARACTERISTICS Attribute Memory Write AC Characteristics Item Write Cycle Time Write Pulse Width Address Setup Time Address Setup Time (-WE) -CE Setup Time (-WE) Data Setup Time (-WE) Data Hold Time Write Recovery Time Output Disable Time (-WE) Output Disable Time (-OE) Output Enable Time (-WE) ...

Page 15

... SLCF064J(I) AC CHARACTERISTICS Attribute Memory Write Timings A0 to A10 -REG -WE -CE2/-CE1 -OE Din (continued) tc(W) tsu(A) tw(WE) tsu(D-WEH) Data In Valid Document Part Number 61000-02805-304 July 2004 COMPACTFLASH trec(WE) th(D) (continued) Page 15 ...

Page 16

... SLCF064J(I) AC CHARACTERISTICS I/O Access Read AC Characteristics Item Data Delay after -IORD Data Hold following -IORD -IORD Width Time Address Setup before -IORD Address Hold following -IORD -CE Setup before -IORD -CE Hold following -IORD -REG Setup before -IORD -REG Hold following -IORD -INPACK Delay Falling from -IORD tdfINPACK(IORD) ...

Page 17

... SLCF064J(I) AC CHARACTERISTICS I/O Access Read Timings A0 to A10 -REG -CE2/-CE1 -IORD -INPACK -IOIS16 tdfIOIS16(ADR D15 (continued) tsuA(IORD) tsuREG(IORD) tsuCE(IORD) tw(IORD) tdfINPACK(IORD) td(IORD) -WE, -OE, -IOWR: High Fix Document Part Number 61000-02805-304 July 2004 COMPACTFLASH thA(IORD) thREG(IORD) thCE(IORD) tdrINPACK(IORD) tdrIOIS16(ADR) th(IORD) valid output ...

Page 18

... SLCF064J(I) AC CHARACTERISTICS I/O Access Write AC Characteristics Item Data Setup before -IOWR Data Hold following -IOWR -IOWR Width Time Address Setup before -IOWR Address Hold following -IOWR -CE Setup before -IOWR -CE Hold following -IOWR -REG Setup before -IOWR -REG Hold following -IOWR -IOIS16 Delay Falling from Address ...

Page 19

... SLCF064J(I) AC CHARACTERISTICS Register Access AC Characteristics for True IDE Parameter Cycle time (min) Address valid to -IORD/-IOWR (min) setup -IORD/-IOWR pulse width 8bit (min) -IORD/-IOWR recovery time (min) -IOWR data setup (min) -IOWR data hold (min) -IORD data setup (min) ...

Page 20

... SLCF064J(I) AC CHARACTERISTICS True IDE Mode Access Read/Write Timings ADDR valid -IORD/-IOWR D15 to D0 (Write) D15 to D0 (Read) -IOIS16 IORDY (continued Document Part Number 61000-02805-304 July 2004 COMPACTFLASH t8 t9 t2i t4 t6 t6Z Page 20 ...

Page 21

... SLCF064J(I) HOST ACCESS SPECIFICATION Attribute Access Specifications The CIS can be accessed by Byte/Word/Odd-byte modes which are defined by CF card standard specifications. The -REG signal must be low when accessing the CIS. Attribute Read Access Mode Function Mode -REG Standby Mode X Byte Access (8-bit) ...

Page 22

... SLCF064J(I) Task File Register Access Specifications There are two cases of Task File register mapping, one is the mapped I/O address area, the other is mapped Memory address area. Task File register read and write operations are described in the charts below. The Task File register can be accessed by Byte/Word/Odd Byte mode which are defined by CF card standard specifications ...

Page 23

... SLCF064J(I) Memory Address Map Task File Register Read Access Mode Mode -REG -CE2 Standby Mode x H Byte Access (8 bit Word Access (16-bit Odd Byte Access (8-bit Task File Register Write Acess Mode Mode -REG -CE2 Standby Mode x H Byte Access (8 bit) ...

Page 24

... SLCF064J(I) True IDE Mode The card is configured in a True IDE mode of operation when the -OE input signal is asserted GND by the host at power up. In the True IDE mode, Attribute Registers are not accessible from the host. The data register is accessed in word (16-bit) mode at power up. The card permits 8-bit accesses if the host issues a Set Feature Command to put the device in 8- bit mode ...

Page 25

... SLCF064J(I) CIS INFORMATION (TYPICAL) ------- 0000: Code 01, link -------- Tuple CISTPL_DEVICE (01), length 3 (03) at offset 0 Device type is FUNCSPEC Device speed is 250ns Write protect switch is not in control Device size is 2K bytes -------- 0005: Code 1C, link -------- Tuple CISTPL_DEVICE_OC (1C), length 4 (04) at offset 5 Device conditions: minimum cycle with WAIT at Vcc = 3.3V ...

Page 26

... SLCF064J(I) -------- 0037: Code 1A, link -------- Tuple CISTPL_CONFIG (1A), length 5 (05) at offset 37 Last valid configuration index is 3 Configuration Register Base Address is 200 Configuration Registers Present: Configuration Option Register at 200 Card Configuration and Status Register at 202 Pin Replacement Register at 204 Socket and Copy Register at 206 ...

Page 27

... SLCF064J(I) -------- 0064: Code 1B, link -------- Tuple CISTPL_CFTABLE_ENTRY (1B), length 15 (0F) at offset 64 Configuration Table Index is 02 (default) Interface type is I/O BVDs not active, WP not active, RdyBsy active Wait signal support not required Vcc Power Description: Nom V = 5.0 V Decode 10 I/O lines, bus size I/O block at 01F0, length 8 ...

Page 28

... SLCF064J(I) CONFIGURATION REGISTER SPECIFICATION This card supports four configuration registers for the purpose of the configuration and observation of the card. These registers can be used in memory card mode and I/O card mode. In True IDE mode, these registers can not be used. Configuration Option Register ...

Page 29

... SLCF064J(I) Configuration and Status Register (Address 202h) This register is used for observing the card state. bit7 bit6 bit5 CHGED SIGCHG IOIS8 Initial Value: 00h Name R/W Function CHGED (CARD->) R This bit indicates that CRDY/-BSY bit on Pin Replacement register is set to “1”. When the CHGED bit is set to “ ...

Page 30

... SLCF064J(I) Pin Replacement Register (Address 204h) This register is used for providing the signal state of -IREQ when the card is configured as the I/O card interface. bit7 bit6 bit5 0 0 CRDY/-BSY CWProt Initial Value: 0Ch Name R/W Function CRDY/-BSY (HOST->) R/W This bit is set to “1” when the RRDY/-BSY bit changes state. This bit may also be written by the host. CWProt (HOST-> ...

Page 31

... SLCF064J(I) TASK FILE REGISTER SPECIFICATION These registers are used for reading and writing data to the card. These registers are mapped four types by the configuration of INDEX in Configuration Option register. A fifth mapping, True IDE, is configured at power up if -OE is held low. Memory Map (INDEX=0) ...

Page 32

... SLCF064J(I) Contiguous I/O Map (INDEX=1) -REG A10- Primary I/O Map (INDEX=2) -REG A10 A9- 1Fh 0 X 1Fh 0 X 1Fh 0 X 1Fh 0 X 1Fh 0 X 1Fh 0 X 1Fh 0 X 1Fh 0 X 1Fh 0 X 1Fh Offset -IORD Data register Error register Sector Count register ...

Page 33

... SLCF064J(I) Secondary I/O Map (INDEX=3) -REG A10 A9- 17h 0 X 17h 0 X 17h 0 X 17h 0 X 17h 0 X 17h 0 X 17h 0 X 17h 0 X 37h 0 X 37h True IDE Mode I/O Map (-OE held low at power up) -CE2 -CE1 -IORD Data register Error register ...

Page 34

... SLCF064J(I) Data Register The Data Register bit read/write register used for transferring data between the card and the host. This register can be accessed in word mode and byte mode. bit15 bit14 bit13 bit12 bit11 bit10 Error Register This read only register is used for analyzing an error. This register is valid when the BSY bit in the Status register and Alternate Status register are set to “ ...

Page 35

... SLCF064J(I) Sector Count Register This register contains the numbers of sectors of data requested to be transferred on a read or write operation between the host and the card. If the value in the register count of 256 sectors is indicated. bit7 bit6 bit5 bit4 Sector Count Byte Sector Number Register ...

Page 36

... SLCF064J(I) Drive/Head Register This register select the device address translation (CHS or LBA) and provides head address (CHS) or high order address bits 27:24 for LBA. bit7 bit6 bit5 bit4 1 LBA 1 DRV bit Name LBA DRV (DRiVe select) 3-0 Head Number (HS3-HS0) bit3 ...

Page 37

... SLCF064J(I) Status Register This read only register indicates status of a command execution. When the BSY bit is “0”, the other bits are valid; when the BSY bit is “1”, the other bits are not valid. When the register is read, the interrupt (-IREQ pin) is cleared. ...

Page 38

... SLCF064J(I) Device Control Register This write only register is used for controlling the interrupt request and issuing an ATA soft reset to the card. bit7 bit6 bit5 bit4 bit Name 7 SRST (Software ReSeT) 1 nIEN (Interrupt ENable Drive Address Register This read only register is used for confirming the card’s status ...

Page 39

... SLCF064J(I) ATA COMMAND SPECIFICATIONS This table with the following paragraphs summarizes the ATA command set. No. Command set 1 Check Power Mode 2 Execute Drive Diagnostic 3 Erase Sector(s) 4 Format Track 5 Identify Drive 6 Idle 7 Idle Immediate 8 Initialize Drive Parameters 9 Read Buffer 10 Read Multiple 11 Read Long Sector ...

Page 40

... SLCF064J(I) Check Power Mode (code: E5h or 98h) This command checks the power mode. Execute Drive Diagnostic (code: 90h) This command performs the internal diagnostic tests implemented by the card. See ERROR register for dianostic codes. Erase Sector(s) (code: C0h) This command is used to pre-erase and condition data sectors in advance ...

Page 41

... SLCF064J(I) Idle (code: E3h or 97h) This command causes the card to set BSY, enter the Idle mode, clear BSY, and generate an interrupt. If the sector count is non-zero, automatic power down mode is enabled. If the sector count is zero, the automatic power down mode is disabled. Idle Immediate ...

Page 42

... SLCF064J(I) Seek (code: 7Xh) This command is effectively a NOP command to the Card although it does perform a range check. Set Features (code: EFh) This command is used by the host to establish or select certain features. Feature 01H Enable 8-bit data transfers 55H Disable Read Look Ahead 66H ...

Page 43

... SLCF064J(I) Write Sector(s) (code: 30h or 31h) This command writes from 1 to 256 sectors as specified in the Sector Count register. A sector count of zero requests 256 sectors. The transfer begins at the sector specified in the Sector Number register. Write Sector(s) without Erase (code: 38h) This command is similar to the Write Sector(s) command with the exception that an implied erase before the write operation is not performed ...

Page 44

... SLCF064J(I) SECTOR TRANSFER PROTOCOL Sector Read One sector read procedure after the card is configured to I/O interface is shown in the following charts. Set the cylinder low/high register Set the head no. of drive head register Set the sector number register Set "01" in sector count register Set " ...

Page 45

... SLCF064J(I) Sector Write One sector write procedure after the card is configured to I/O interface is shown in the following charts. Set the cylinder low/high register Set the head no. of drive head register Set the sector number register Set "01" in sector count register Set "30H" in command register ...

Page 46

... SLCF064J(I) REVISION HISTORY Rev. Change Description from Previous Revision -301 5/26/04. Initial Release. -302 7/1/04. Features bullets on page 1 updated. Pin Assignments for IDE Mode corrected to indicate which pins are not used in IDE Mode. Pinout of the PC Card to CF Adapter corrected to call out DASP and -PDIAG. Pin Description changes: -CD1 and -CD2 not used in IDE mode ...