TC51WKM516AXGN75 Toshiba, TC51WKM516AXGN75 Datasheet

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TC51WKM516AXGN75

Manufacturer Part Number
TC51WKM516AXGN75
Description
Manufacturer
Toshiba
Datasheet

Specifications of TC51WKM516AXGN75

Operating Temperature (max)
85C
Mounting
Surface Mount
Operating Temperature Classification
Commercial
Lead Free Status / RoHS Status
Compliant
2,097,152-WORD BY 16-BIT CMOS PSEUDO STATIC RAM
DESCRIPTION
2,097,152 words by 16 bits. Using Toshiba’s CMOS technology and advanced circuit techniques, it provides high
density, high speed and low power. The device uses dual power supplies(2.6 to 3.3 V for core and 1.7 to 2.2 V for
output buffer). The device also features SRAM-like W/R timing whereby the device is controlled by CE1 , OE , and
deep power-down mode, realizing low-power standby.
FEATURES
PIN ASSIGNMENT
WE on asynchronous. The device has the page access operation. Page size is 8 words. The device also supports
The TC51WKM516AXGN is a 33,554,432-bit pseudo static random access memory(PSRAM) organized as
G
Organized as 2,097,152 words by 16 bits
Dual power supplies(2.6 to 3.3 V for core and
Direct TTL compatibility for all inputs and outputs
Deep power-down mode: Memory cell data invalid
Page operation mode:
Logic compatible with SRAM R/W ( WE ) pin
Standby current
A
B
C
D
E
F
H
1.7 to 2.2 V for output buffer)
Page read operation by 8 words
Standby
Deep power-down standby
V DDQ I/O13
I/O10 I/O11
I/O15 I/O14
I/O16
GND
I/O9
A18
LB
1
I/O12
A19
OE
UB
A8
2
TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS
(FBGA48)
A17
A14
A12
NC
A0
A3
A5
A9
3
A16
A15
A13
A10
A1
A4
A6
A7
(TOP VIEW)
4
CE1
I/O2
I/O4
I/O5
I/O6
WE
A11
A2
5
70 µA
GND
V DD
CE2
I/O1
I/O3
I/O7
I/O8
5 µA
A20
6
Access Times:
Package:
Lead-Free
PIN NAMES
Access Time
Page Access Time
P-TFBGA48-0607-0.75AZ (Weight:0.085 g typ.)
I/O1 to I/O16 Data Inputs/Outputs
CE1
OE Access Time
A0 to A20
LB , UB
A0 to A2
V
GND
CE2
V
CE1
WE
OE
NC
DDQ
Access Time
DD
TC51WKM516AXGN75
Address Inputs
Page Address Inputs
Chip Enable Input
Chip select Input
Write Enable Input
Output Enable Input
Data Byte Control Inputs
Power Supply for Core
Power Supply for Output Buffer
Ground
No Connection
2005-03-11 1/10
Lead-Free
75 ns
75 ns
25 ns
30 ns

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TC51WKM516AXGN75 Summary of contents

Page 1

... Package: • Lead-Free 70 µA 5 µA PIN NAMES 6 CE2 I/O1 I/ GND I/O7 I/O8 A20 TC51WKM516AXGN75 Lead-Free Access Time 75 ns Access Time 75 ns CE1 OE Access Time 25 ns Page Access Time 30 ns P-TFBGA48-0607-0.75AZ (Weight:0.085 g typ A20 Address Inputs Page Address Inputs I/O1 to I/O16 Data Inputs/Outputs ...

Page 2

... CONTROL SIGNAL GENERATOR CE CE2 Add High-Z = High-impedance TC51WKM516AXGN75 V DD GND I/O1 to I/O8 I/O9 to I/O16 OUT OUT X D High-Z OUT X High-Z D OUT Invalid IN X Invalid High-Z High-Z X High-Z High-Z X High-Z High-Z 2005-03-11 2/10 POWER I DDO I DDO I DDO I DDO I DDO I DDO I DDO I DDS ...

Page 3

... CE1 Page add. cycling, I OUT = V − 0.2 V, CE2 = V CE1 DD CE2 = 0.2 V TEST CONDITION = GND GND V OUT TC51WKM516AXGN75 VALUE − 1.0 to 3.6 − 1 0.5 (3.6 V Max) DD − 1.0 to 3.6 − 1 0.5 DDQ − − 150 260 0.6 50 MIN TYP. MAX 2.6 2.75 3 ...

Page 4

... CE2 Pulse Width DPD t CE2 Hold from CE1 CHC t CE2 Hold from Power On CHP AC TEST CONDITIONS PARAMETER Output load Input pulse level Timing measurements Reference level 1.7 to 2.2 V) (See Note 5 to 11) DDQ PARAMETER TC51WKM516AXGN75 UNIT MIN MAX 75 10000 ns ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ...

Page 5

... PAGE READ CYCLE (8 words access) Address Address A3 to A20 CE1 CE2 OUT Hi-Z I/O1 to I/O16 ACC OEE t COE INDETERMINATE AOH OEE OUT OUT t COE ACC TC51WKM516AXGN75 ODO t BD VALID DATA OUT AOH AOH OUT OUT ODO * Maximum 8 words 2005-03-11 5/10 Fix-H Hi-Z Fix Hi-Z ...

Page 6

... AS WE CE1 t CH CE2 OUT (See Note 10) I/O1 to I/O16 D IN (See Note 9) I/O1 to I/O16 CE WRITE CYCLE 2 ( CONTROLLED) Address A0 to A20 CE1 t CH CE2 OUT Hi-Z I/O1 to I/O16 D IN (See Note 9) I/O1 to I/O16 TC51WKM516AXGN75 (See Note ODW OEW Hi VALID DATA IN (See Note ...

Page 7

... WC CE1 WE Address t DPD t CS min t CHC t CHP min sustain over 10µ active status, as least one RC over 10 µ s min sustain over 10µ active status, as least one WC min must be needed during 10µs. WP over 10 µ s TC51WKM516AXGN75 min RC t min WP t min WC 2005-03-11 7/10 ...

Page 8

... If CE1 goes LOW coincident with or after WE goes LOW, the outputs will remain at high impedance. (11) If CE1 goes HIGH coincident with or before WE goes HIGH, the outputs will remain at high impedance ns and t define the time at which the output goes the open condition and BD ODW TC51WKM516AXGN75 2005-03-11 8/10 ...

Page 9

... PACKAGE DIMENSIONS P-TFBGA48-0607-0.75AZ Weight:0.085 g (typ) 7.0 0 0.15 0 0.1 S 0.43 0.05 φ0. 0.375 0.75 (5.25) 0.875 TC51WKM516AXGN75 Unit: 2005-03-11 9/10 ...

Page 10

... The products described in this document are subject to the foreign exchange and foreign trade laws. • TOSHIBA products should not be embedded to the downstream products which are prohibited to be produced and sold, under any law and regulations. TC51WKM516AXGN75 030619EBA 2005-03-11 10/10 ...

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