M378T2953GZ3-CF7 Samsung Semiconductor, M378T2953GZ3-CF7 Datasheet

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M378T2953GZ3-CF7

Manufacturer Part Number
M378T2953GZ3-CF7
Description
Manufacturer
Samsung Semiconductor
Datasheet

Specifications of M378T2953GZ3-CF7

Lead Free Status / RoHS Status
Compliant
UDIMM
INFORMATION IN THIS DOCUMENT IS PROVIDED IN RELATION TO SAMSUNG PRODUCTS,
AND IS SUBJECT TO CHANGE WITHOUT NOTICE. NOTHING IN THIS DOCUMENT SHALL BE
CONSTRUED AS GRANTING ANY LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHER-
WISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IN SAMSUNG PRODUCTS OR TECHNOL-
OGY. ALL INFORMATION IN THIS DOCUMENT IS PROVIDED ON AS "AS IS" BASIS WITHOUT
GUARANTEE OR WARRANTY OF ANY KIND.
1. For updates or additional information about Samsung products, contact your nearest Samsung office.
2. Samsung products are not intended for use in life support, critical care, medical, safety equipment, or similar
* Samsung Electronics reserves the right to change products or specification without notice.
applications where Product failure could result in loss of life or personal or physical harm, or any military or
defense application, or any governmental procurement to which special terms or provisions may apply.
240pin Unbuffered Module based on 512Mb G-die
DDR2 Unbuffered SDRAM MODULE
60FBGA with Lead-Free and Halogen-Free
64/72-bit Non-ECC/ECC
(RoHS compliant)
1 of 22
Rev. 1.2 July 2008
DDR2 SDRAM

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M378T2953GZ3-CF7 Summary of contents

Page 1

... UDIMM DDR2 Unbuffered SDRAM MODULE 240pin Unbuffered Module based on 512Mb G-die 60FBGA with Lead-Free and Halogen-Free INFORMATION IN THIS DOCUMENT IS PROVIDED IN RELATION TO SAMSUNG PRODUCTS, AND IS SUBJECT TO CHANGE WITHOUT NOTICE. NOTHING IN THIS DOCUMENT SHALL BE CONSTRUED AS GRANTING ANY LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHER- WISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IN SAMSUNG PRODUCTS OR TECHNOL- OGY. ALL INFORMATION IN THIS DOCUMENT IS PROVIDED ON AS " ...

Page 2

... Input AC Logic Level 10.5 AC Input Test Conditions 11.0 IDD Specification Parameters Definition ................................................................................14 12.0 Operating Current Table : ........................................................................................................15 12.1 M378T6553GZS : 512MB(64Mx8 *8) Module 12.2 M378T2953GZ3 : 1GB(64Mx8 *16) Module 12.3 M391T6553GZ3 : 512MB(64Mx8 *9) Module 12.4 M391T2953GZ3 : 1GB(64Mx8 *18) Module 13.0 Input/Output Capacitance .........................................................................................................17 14.0 Electrical Characteristics & AC Timing for DDR2-800/667 ....................................................17 14 ...

Page 3

UDIMM Revision History Revision Month Year 1.0 September 2007 1.1 March 2008 1.2 July 2008 - Initial Release - Update the product line-up - Applied JEDEC update(JESD79-2E timing table DDR2 SDRAM History Rev. 1.2 July ...

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... UDIMM 1.0 DDR2 Unbuffered DIMM Ordering Information Part Number Density M378T6553GZS-CE7/F7/E6 M378T2953GZ3-CE7/F7/E6 M391T6553GZ3-CE7/F7/E6 M391T2953GZ3-CE7/F7/E6 Note : 1. “Z” of Part number(11th digit) stands for Lead-Free products. 2. “3” of Part number(12th digit) stands for Dummy Pad PCB products. 2.0 Features • Performance range Speed@CL3 ...

Page 5

... DQ22 DQ18 150 DQ23 Connect, RFU = Reserved for Future Use 1. Pin196(A13) is used for x8 base Unbuffered DIMM. 2. The TEST pin is reserved for bus analysis tools and is not connected on standard memory module products (DIMMs.) Front Pin Back Pin Front V DQ19 151 61 A4 ...

Page 6

... DQ23 Connect, RFU = Reserved for Future Use 1. Pin196(A13) is used for x4/x8 base Unbuffered DIMM. 2. The TEST pin is reserved for bus analysis tools and is not connected on standard memory module products (DIMMs.) 6.0 Pin Description Pin Name Description A0-A13 DDR2 SDRAM address bus ...

Page 7

... Power and ground for DDR2 SDRAM input buffers, and core logic Supply DD SS these modules. DQS0-DQS8 Data strobe for input and output data. For Rawcards using x16 orginized DRAMs DQ0-7 connect to the LDQS pin of the In/Out DQS0-DQS8 DRAMs and DQ8-17 connect to the UDQS pin of the DRAM ...

Page 8

... UDIMM 8.0 Functional Block Diagram : 8.1 512MB, 64Mx64 Module - M378T6553GZS (Populated as 1 rank of x8 DDR2 SDRAMs) S0 DQS0 DQS0 DM0 DM CS DQS DQS DQ0 I/O 0 DQ1 D0 I/O 1 DQ2 I/O 2 DQ3 I/O 3 DQ4 I/O 4 DQ5 I/O 5 DQ6 I/O 6 DQ7 I/O 7 DQS1 DQS1 DM1 ...

Page 9

... UDIMM 8.2 512MB, 64Mx72 ECC Module - M391T6553GZ3 S0 DQS0 DQS0 DM0 DM CS DQS DQS DQ0 I/O 0 DQ1 I DQ2 I/O 2 DQ3 I/O 3 DQ4 I/O 4 DQ5 I/O 5 DQ6 I/O 6 DQ7 I/O 7 DQS1 DQS1 DM1 DM CS DQS DQS DQ8 I/O 0 DQ9 I DQ10 I/O 2 DQ11 I/O 3 ...

Page 10

... UDIMM 8.3 1GB, 128Mx64 Module - M378T2953GZ3 (Populated as 2 ranks of x8 DDR2 SDRAMs DQS0 DQS0 DM0 DM CS DQS DQS DQ0 I/O 0 DQ1 I DQ2 I/O 2 DQ3 I/O 3 DQ4 I/O 4 DQ5 I/O 5 DQ6 I/O 6 DQ7 I/O 7 DQS1 DQS1 DM1 DM CS DQS DQS DQ8 I/O 0 ...

Page 11

... UDIMM 8.4 1GB, 128Mx72 ECC Module - M391T2953GZ3 (Populated as 2 ranks of x8 DDR2 SDRAMs DQS0 DQS0 DM0 DM CS DQS DQS DQ0 I/O 0 DQ1 I DQ2 I/O 2 DQ3 I/O 3 DQ4 I/O 4 DQ5 I/O 5 DQ6 I/O 6 DQ7 I/O 7 DQS1 DQS1 DM1 DM CS DQS DQS DQ8 ...

Page 12

UDIMM 9.0 Absolute Maximum DC Ratings Symbol Parameter Voltage on V pin relative Voltage on V pin relative DDQ DDQ Voltage on V pin relative DDL DDL Voltage on ...

Page 13

UDIMM 10.2 Operating Temperature Condition Symbol T Operating Temperature OPER Note : 1. Operating Temperature is the case surface temperature on the center/top side of the DRAM. For the measurement conditions, please refer to JESD51.2 standard ...

Page 14

UDIMM 11.0 IDD Specification Parameters Definition (IDD values are for full operating range of Voltage and Temperature) Symbol Operating one bank active-precharge current; IDD0 tCK = tCK(IDD), tRC = tRC(IDD), tRAS = tRASmin(IDD); CKE is HIGH HIGH between ...

Page 15

... IDD4W 880 IDD4R 1,120 IDD5B 880 IDD6 64 IDD7 1,680 * Module IDD was calculated on the basis of component IDD and can be differently measured according to DQ loading cap. 12.2 M378T2953GZ3 : 1GB(64Mx8 *16) Module Symbol E7(800@CL=5) IDD0 1,000 IDD1 1,080 IDD2P 128 IDD2Q 560 IDD2N ...

Page 16

... IDD3N 900 IDD4W 1,350 IDD4R 1,620 IDD5B 1,350 IDD6 144 IDD7 2,250 * Module IDD was calculated on the basis of component IDD and can be differently measured according to DQ loading cap. F7(800@CL=6) E6(667@CL=5) 765 675 855 810 72 72 315 315 360 360 270 ...

Page 17

... CIO - = 1.8V + 0.1V) DD Symbol tRFC 0 °C ≤ T ≤ 85°C CASE tREFI 85 °C < T ≤ 95°C CASE DDR2-800(F7 max min 3. 2 70000 DDR2 SDRAM (V =1.8V DDQ Max Min Max M378T2953GZ3 M391T2953GZ3 256Mb 512Mb 1Gb 2Gb 75 105 127.5 195 7.8 7.8 7.8 7.8 3 ...

Page 18

UDIMM 14.3 Timing Parameters by Speed Grade (Refer to notes for informations related to this table at the component datasheet) Parameter DQ output access time from CK/CK DQS output access time from CK/CK Average clock HIGH pulse width Average clock ...

Page 19

UDIMM Parameter Four Activate Window for 1KB page size products Four Activate Window for 2KB page size products CAS to CAS command delay Write recovery time Auto precharge write recovery + precharge time Internal write to read command delay Internal ...

Page 20

... UDIMM 15.0 Physical Dimensions : 15.1 64Mbx8 based 64Mx64 Module (1 Rank) - M378T6553GZS (2) 2.50 5.00 4.00 2.50 1.50±0.10 Detail A The used device is 64M x8 DDR2 SDRAM, FBGA. DDR2 SDRAM Part NO : K4T51083QG 133.35 131.35 128. 63.00 4.00 0.80±0.05 3.80 0.20 1.00 Detail DDR2 SDRAM ...

Page 21

... UDIMM 15.2 64Mbx8 based 64Mx72 Module(1 Rank) (2) 2.50 5.00 4.00 2.50 1.50±0.10 Detail A The used device is 64M x8 DDR2 SDRAM, FBGA. DDR2 SDRAM Part NO : K4T51083QG - M391T6553GZ3 133.35 131.35 128.95 ECC SPD (for x72 63.00 4.00 0.80±0.05 3.80 1.00 Detail DDR2 SDRAM Units : Millimeters 30 ...

Page 22

... UDIMM 15.3 64Mbx8 based 128Mx64/x72 Module (2 Ranks) (2) 2.50 63.00 5.00 4.00 2.50 1.50±0.10 Detail A The used device is 64M x8 DDR2 SDRAM, FBGA. DDR2 SDRAM Part NO : K4T51083QG - M378T2953GZ3/M391T2953GZ3 133.35 131.35 128.95 N/A (for x64) ECC SPD (for x72 55.00 N/A (for x64) ...

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