5962-9232404MXX Cypress Semiconductor Corp, 5962-9232404MXX Datasheet

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5962-9232404MXX

Manufacturer Part Number
5962-9232404MXX
Description
Manufacturer
Cypress Semiconductor Corp
Type
NVSRAMr
Datasheet

Specifications of 5962-9232404MXX

Word Size
8b
Organization
8Kx8
Density
64Kb
Interface Type
Parallel
Access Time (max)
55ns
Operating Supply Voltage (typ)
5V
Operating Temperature Classification
Military
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
4.5V
Operating Temp Range
-55C to 125C
Pin Count
28
Mounting
Through Hole
Supply Current
55mA
Lead Free Status / RoHS Status
Not Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
5962-9232404MXX
Manufacturer:
SIMTEK
Quantity:
269
Features
Cypress Semiconductor Corporation
Document Number: 001-51001 Rev. *A
Logic Block Diagram
35 ns, 45 ns, and 55 ns access times
Pin compatible with industry standard SRAMs
Software initiated nonvolatile STORE
Unlimited Read and Write endurance
Automatic RECALL to SRAM on power up
Unlimited RECALL cycles
1,000,000 STORE cycles
100 year data retention
Single 5V ± 10% operation
Military temperature
28-pin (300 mil) CDIP and 28-pad LCC packages
DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ
A
A
A
A
A
A
A
0
1
2
3
4
7
5
6
5
6
7
8
9
11
12
A
0
COLUMN DEC
198 Champion Court
COLUMN I/O
A
STATIC RAM
1
128 X 512
ARRAY
A
2
A
3
A
4
Quantum Trap
A
10
64 Kbit (8K x 8) SoftStore nvSRAM
128 X 512
STORE
RECALL
Functional Description
The Cypress STK11C68-5 is a 64 Kb fast static RAM with a
nonvolatile element in each memory cell. The embedded
nonvolatile elements incorporate QuantumTrap technology to
produce the world’s most reliable nonvolatile memory. The
SRAM provides unlimited read and write cycles, while
independent nonvolatile data resides in the highly reliable
QuantumTrap cell. Data transfers under software control from
SRAM to the nonvolatile elements (the STORE operation). On
power up, data is automatically restored to the SRAM (the
RECALL operation) from the nonvolatile memory. RECALL
operations are also available under software control.
STK11C68-5 (SMD5962-92324)
San Jose
V
CONTROL
CONTROL
CC
RECALL
POWER
STORE/
V
CAP
,
SOFTWARE
DETECT
CA 95134-1709
HSB
A
OE
CE
WE
0
-
A
12
Revised April 07, 2009
408-943-2600
[+] Feedback

Related parts for 5962-9232404MXX

5962-9232404MXX Summary of contents

Page 1

... Cypress Semiconductor Corporation Document Number: 001-51001 Rev. *A STK11C68-5 (SMD5962-92324) 64 Kbit ( SoftStore nvSRAM Functional Description The Cypress STK11C68 fast static RAM with a nonvolatile element in each memory cell. The embedded nonvolatile elements incorporate QuantumTrap technology to produce the world’s most reliable nonvolatile memory. The ...

Page 2

... Deasserting OE HIGH causes the I/O pins to tristate. V Ground Ground for the Device. The device is connected to ground of the system Power Supply Power Supply Inputs to the Device. CC Document Number: 001-51001 Rev. *A STK11C68-5 (SMD5962-92324) Figure 2. Pin Diagram - 28-Pin LLC Description Page [+] Feedback ...

Page 3

... Read address 0x10F0, Valid READ 6. Read address 0x0F0F, Initiate STORE cycle Document Number: 001-51001 Rev. *A STK11C68-5 (SMD5962-92324) The software sequence is clocked with CE controlled Reads. When the sixth address in the sequence is entered, the STORE cycle commences and the chip is disabled important that Read cycles and not Write cycles are used in the sequence ...

Page 4

... Note 1. The six consecutive addresses must be in the order listed. WE must be high during all six consecutive CE controlled cycles to enable a nonvolatile cycle. Document Number: 001-51001 Rev. *A STK11C68-5 (SMD5962-92324) Figure 4. Current Versus Cycle Time (Write) Best Practices Cypress nvSRAM products have been used effectively for over 15 years. While ease of use is one of the product’ ...

Page 5

... IH 3. These parameters are guaranteed by design and are not tested. Document Number: 001-51001 Rev. *A STK11C68-5 (SMD5962-92324) Voltage on DQ Power Dissipation ......................................................... 1.0W DC Output Current (1 output at a time, 1s duration).... 15 mA ...

Page 6

... AC Test Conditions Input Pulse Levels .................................................... Input Rise and Fall Times (10% to 90%) ...................... <5 ns Input and Output Timing Reference Levels .................... 1.5V Document Number: 001-51001 Rev. *A STK11C68-5 (SMD5962-92324) [3] Test Conditions Test conditions follow standard test methods and proce- dures for measuring thermal impedance, per EIA / JESD51 ...

Page 7

... Figure 6. SRAM Read Cycle 1: Address Controlled Figure 7. SRAM Read Cycle 2: CE and OE Controlled Notes 4. WE must be High during SRAM Read cycles. 5. I/O state assumes CE and OE < V and WE > Measured ± 200 mV from steady state output voltage. Document Number: 001-51001 Rev. *A STK11C68-5 (SMD5962-92324 Min Max ...

Page 8

... PREVIOUS DATA DATA OUT Figure 9. SRAM Write Cycle 2: CE and OE Controlled ADDRESS DATA IN DATA OUT Notes Low when CE goes Low, the outputs remain in the high impedance state must be greater than V during address transitions. IH Document Number: 001-51001 Rev. *A STK11C68-5 (SMD5962-92324 Description Min Max ...

Page 9

... STORE INHIBIT POWER-UP RECALL t HRECALL DQ (DATA OUT) POWER-UP RECALL Notes 9. t starts from the time V rises above V HRECALL CC Document Number: 001-51001 Rev. *A STK11C68-5 (SMD5962-92324) Description BROWN OUT BROWN OUT STORE INHIBIT STORE INHIBIT NO RECALL NO RECALL (V DID NOT GO (V DID NOT BELOW V ...

Page 10

... SCE CE t HACE OE DATA VALID DQ (DATA) Notes 10. The software sequence is clocked on the falling edge of CE without involving OE (double clocking aborts the sequence). 11. The six consecutive addresses must be read in the order listed in Document Number: 001-51001 Rev. *A STK11C68-5 (SMD5962-92324) [10, 11 Description Min Max ...

Page 11

... Part Numbering Nomenclature STK11C68 - SMD5962-92324 Document Number: 001-51001 Rev. *A STK11C68-5 (SMD5962-92324) Temperature Range Military (-55 to 125°C) Package Ceramic 28-pin 300 mil DIP (gold lead finish Ceramic 28-pin 300 mil DIP (Solder dip finish Ceramic 28-pin LLC Retention / Endurance Military (10 years or 10 ...

Page 12

... STK11C68-5K45M STK11C68-5L45M 55 STK11C68-5C55M STK11C68-5K55M STK11C68-5L55M This table contains Final information. Contact your local Cypress sales representative for availability of these parts. Document Number: 001-51001 Rev. *A STK11C68-5 (SMD5962-92324) Package Diagram Package Type 001-51695 28-Pin CDIP (300 mil) 001-51695 28-Pin CDIP (300 mil) 001-51696 ...

Page 13

... Package Diagrams Figure 12. 28-Pin (300-Mil) Side Braze DIL (001-51695) Document Number: 001-51001 Rev. *A STK11C68-5 (SMD5962-92324) 001-51695 ** Page [+] Feedback ...

Page 14

... Package Diagrams (continued) 1. ALL DIMENSION ARE IN INCHES AND MILLIMETERS [MIN/MAX] 2. JEDEC 95 OUTLINE# MO-041 3. PACKAGE WEIGHT : TBD Document Number: 001-51001 Rev. *A STK11C68-5 (SMD5962-92324) Figure 13. 28-Pad (350-Mil) LCC (001-51696) 001-51696 ** Page [+] Feedback ...

Page 15

... Document History Page Document Title: STK11C68-5 (SMD5962-92324) 64 Kbit ( SoftStore nvSRAM Document Number: 001-51001 Rev. ECN No. Orig. of Change ** 2666844 GVCH/PYRS *A 2685053 GVCH Sales, Solutions, and Legal Information Worldwide Sales and Design Support Cypress maintains a worldwide network of offices, solution centers, manufacturer’s representatives, and distributors. To find the office closest to you, visit us at cypress ...

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