FW82801CA S L632 Intel, FW82801CA S L632 Datasheet - Page 2

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FW82801CA S L632

Manufacturer Part Number
FW82801CA S L632
Description
Manufacturer
Intel
Datasheet

Specifications of FW82801CA S L632

Lead Free Status / RoHS Status
Not Compliant
Intel® E7500 Chipset for Embedded Computing - Overview
http://www.intel.com/design/chipsets/embedded/273686.htm (2 of 4)12/10/2006 8:14:31 PM
through a point-to-point Hub Interface 2.0 connection. Up to three P64H2 devices can be
attached to the MCH, each providing an I/O bandwidth greater than 1 GB/s for a total of 3.2
GB/s of I/O bandwidth. Each P64H2 contains two independent 64-bit PCI-X interfaces and
twoPCI hot plug controllers, one per PCI-X interface. Each 64-bit PCI-X segment supports
multiple PCI-X slots for high-bandwidth connectivity of next-generation components such as
Intel® Gigabit Ethernet adapters and Intel ® I/O processors.
The 82801CA I/O Controller Hub 3-S (ICH3-S) connects to the MCH through a point-to-
point Hub Interface 1.5 connection. The ICH3-S provides legacy I/O interfaces through
integrated features including a two-channel Ultra ATA/100 bus master IDE controller and
three USB controllers for up to six USB ports. The ICH3-S also offers an integrated System
Manageability Bus 2.0 (SMBus 2.0) controller, an integrated LAN controller, as well as AC97
2.2-compliant and PCI 2.2-compliant interfaces.
Features that maximize performance and balance the platform: Dual Intel Xeon processors
with 512 KB L2 cache or Low Voltage Intel Xeon processors and a 400 MHz system bus
provide up to 3.2 GB/s of available bandwidth. Dual DDR-200 memory channels operate in
lock-step to provide up to 3.2 GB/s of memory bandwidth. Three Hub Interface 2.0
connections provide multiple high-bandwidth I/O configuration options, yielding up to 3.2 GB/
s of I/O bandwidth.
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