LT4430IS6#PBF Linear Technology, LT4430IS6#PBF Datasheet - Page 7

• Manufacturer Part Number: LT4430IS6#PBF
• Manufacturer: Linear Technology

Specifications of LT4430IS6#PBF

• Operating Temperature (max): 125C
• Operating Temperature (min): -40C
• Pin Count: 6
• Mounting: Surface Mount
• Package Type: TSOT-23
• Case Length: 2.9mm
• Screening Level: Automotive
• Lead Free Status / RoHS Status: Compliant

PIN FUNCTIONS
V
ternal circuitry. The input supply range is 3V minimum
to 20V maximum and the typical input quiescent current
is 1.9mA. Connect a 1μF bypass capacitor directly from
V
GND (Pin 2): Analog Ground Pin. It is also the negative
sense terminal for the internal 0.6V reference. Connect the
external feedback divider network that terminates to ground
directly to this pin for best regulation and performance.
OC (Pin 3): Overshoot Control Pin. A typical 8.5μA current
source and a capacitor placed from this pin to GND controls
output voltage overshoot on start-up and recovery from
short-circuit. The typical ramp time is (C
If V
the OC pin is actively held low. The OC pin also ties to the
overshoot control amplifi er output. This amplifi er moni-
tors the FB pin voltage and the error amplifi er output. If
FB is low due to a short-circuit fault condition, the COMP
pin goes high. Logic detects the error amplifi er COMP pin
high state and activates the overshoot control amplifi er.
The amplifi er responds by discharging the OC capacitor
down to the FB voltage plus a built-in offset voltage of
48mV. If the short-circuit condition persists, the amplifi er
maintains the voltage on OC. If the short-circuit condition
goes away, the FB pin recovers under the control of the
OC pin.
IN
IN
IN
to GND.
(Pin 1): This is the input supply that powers all in-
is below V
UVLO
(its undervoltage lockout threshold),
OC
• 0.6V)/8.5μA.
FB (Pin 4): This is the inverting input of the error ampli-
fi er. The noninverting input is tied to the internal 0.6V
reference. Input bias current for this pin is typically 75nA
fl owing out of the pin. This pin normally ties to a resistor
divider network to set output voltage. Tie the top of the
external resistor divider directly to the output voltage for
best regulation performance.
COMP (Pin 5): This is the output of the error amplifi er. The
error amplifi er is a true voltage-mode error amplifi er and
frequency compensation is performed around the amplifi er.
Typical LT4430 compensation schemes use series R-C in
parallel with C networks from the COMP pin to the FB pin.
COMP also ties to the overshoot control amplifi er logic
that detects if the COMP pin is at its high clamp level. The
logic activates the overshoot control amplifi er if COMP is
at its clamp level for longer than 1μs.
OPTO (Pin 6): This is the output of the amplifi er that
drives the opto-coupler. The opto driver amplifi er uses an
inverting gain of six confi guration to drive the opto-coupler
referenced to ground. Driving the opto-coupler referenced
to GND accommodates low output voltages and eases
loop frequency compensation as the secondary feedback
path with a traditional “431” topology is eliminated. The
opto driver amplifi er sources a maximum of 10mA, sinks
350μA typically and is short-circuit protected.
LT4430
4430fa
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