MC33926PNB Freescale, MC33926PNB Datasheet - Page 3

• Manufacturer Part Number: MC33926PNB
• Manufacturer: Freescale

Specifications of MC33926PNB

• Operating Temperature (max): 125C
• Operating Temperature (min): -40C
• Pin Count: 32
• Mounting: Surface Mount
• Case Length: 8mm
• Screening Level: Automotive
• Lead Free Status / RoHS Status: Compliant

Table 1. 33926 Pin Definitions
A functional description of each pin can be found in the Functional Description section beginning on
4, 6, 11, 31
Exposed
9, 17, 25
Analog Integrated Circuit Device Data
Freescale Semiconductor
Pad
Pin
10
5,
1
2
3
7
8
Transparent Top
View of Package
Pin Name
VPWR
SLEW
AGND
INV
IN1
NC
EN
IN2
FB
Power Input
Logic Input
Logic Input
Logic Input
Logic Input
Logic Input
Function
Ground
Analog
Analog
Output
Pin
Positive Power
VPWR
VPWR
Formal Name
AGND
Analog Signal
SLEW
Enable Input
No Connect
Input Invert
Slew Rate
Feedback
INV
IN2
IN1
Ground
NC
Input 2
Input 1
Supply
FB
Figure 3. 33926 Pin Connections
PIN CONNECTIONS
1
2
3
4
5
6
7
8
9
32
10 11 12 13 14 15 16
Logic input control of OUT2; e.g., when IN2 is logic HIGH, OUT2 is set to V
and when IN2 is logic LOW, OUT2 is set to PGND. (Schmitt trigger input with
~ 80 μA source so default condition = OUT2 HIGH.)
Logic input control of OUT1; e.g., when IN1 is logic HIGH, OUT1 is set to V
and when IN1 is logic LOW, OUT1 is set to PGND. (Schmitt trigger Input with
~ 80 μA source so default condition = OUT1 HIGH.)
Logic input to select fast or slow slew rate. (Schmitt trigger input with ~ 80 μA
sink so default condition = slow.)
These pins must be connected together physically as close as possible and
directly soldered down to a wide, thick, low resistance supply plane on the PCB.
The low current analog signal ground must be connected to PGND via low
impedance path (<<10 mΩ, 0 Hz to 20 kHz). Exposed copper pad is also the
main heatsinking path for the device.
Sets IN1 and IN2 to logic LOW = TRUE. (Schmitt trigger input with ~ 80 μA sink
so default condition = non-inverted.)
Load current feedback output provides ground referenced 0.24% of H-Bridge
high-side output current. (Tie pin to GND through a resistor if not used.)
No internal connection is made to this pin.
When EN is logic HIGH, the device is operational. When EN is logic LOW, the
device is placed in Sleep mode. (logic input with ~ 80 μA sink so default
condition = Sleep mode.)
31
30
AGND
29
28
27
26
25
24
23
22
21
20
19
18
17
Definition
NC
PGND
PGND
PGND
SF
PGND
PGND
PGND
NC
page
12.
PIN CONNECTIONS
PWR
PWR
33926
,
,
3