MCZ33996EK Freescale, MCZ33996EK Datasheet - Page 10

• Manufacturer Part Number: MCZ33996EK
• Manufacturer: Freescale

Specifications of MCZ33996EK

• Switch Type: Low Side
• Power Switch Family: 33996
• Input Voltage: -0.3 to 7V
• Power Switch On Resistance: 550mOhm
• Output Current: 900mA
• Number Of Outputs: 16
• Mounting: Surface Mount
• Supply Current: 4mA
• Package Type: SOIC W EP
• Operating Temperature (min): -40C
• Operating Temperature Classification: Automotive
• Pin Count: 32
• Power Dissipation: 1.7W
• Lead Free Status / RoHS Status: Compliant

industrial applications. It is a 16 output power switch having
24 bit serial control. The 33996 incorporates SMARTMOS
technology having CMOS logic, bipolar / MOS analog
CHIP SELECT (CS)
with through the use of the Chip Select (
pin is in a logic low state, data can be transferred from the
MCU to the 33996 and vise versa. Clocked-in data from the
MCU is transferred from the 33996 Shift register and latched
into the power outputs on the rising edge of the
the falling edge of the
information is transferred from the Power Outputs Status
register into the device’s SO Shift register. The SO pin output
driver is enabled when
transferred from the 33996 to the MCU. To avoid any
spurious data, it is essential the high-to-low transition of the
CS
SYSTEM CLOCK (SCLK)
registers of the 33996. The Serial Input (SI) pin accepts data
into the Input Shift register on the falling edge of the SCLK
signal, while the Serial Output (SO) pin shifts data information
out of the Shift register on the rising edge of the SCLK signal.
False clocking of the Shift register must be avoided, ensuring
validity of data. It is essential that the SCLK pin be in a logic
low state whenever the
reason, it is recommended, though not necessary, that the
SCLK pin is commanded to a low logic state as long as the
device is not accessed (
is in a logic high state, any signal at the SCLK and SI pins is
ignored and the SO is tri-stated (high impedance).
SERIAL INPUT (SI)
serial instructions into the 33996. SI SPI bits are latched into
the Input Shift register on each falling edge of SCLK. The
Shift register is full after 24 bits of information are entered.
The 33996 operates on the command word on the rising edge
of
transition SI as SCLK transitions from high to low state (see
Figure
SERIAL OUTPUT (SO)
the 33996 to the MCU. The SO pin remains tri-state until the
CS
are reported to the MCU as logic [1]. Conversely, normal
operating outputs with nonfaulted loads are reported as
logic [0]. On the falling edge of the
10
33996
FUNCTIONAL DESCRIPTION
FUNCTIONAL PIN DESCRIPTION
CS
The 33996 is designed and developed for automotive and
The system MCU selects the 33996 to be communicated
The System Clock (SCLK) pin clocks the Internal Shift
The Serial Input (SI) pin is used to enter one of seven
The Serial Output (SO) pin transfers fault status data from
pin transitions to a logic low state. All faults on the 33996
signal occur only when SCLK is in a logic low state.
. To preserve data integrity, exercise care not to
4, page 8).
CS
CS
CS
CS
signal, output fault status
is low, allowing information to be
pin makes any transition. For this
in logic high state). When the
CS
signal, output fault
CS
) pin. When the
FUNCTIONAL DESCRIPTION
FUNCTIONAL PIN DESCRIPTION
CS
signal. On
CS
CS
circuitry, and independent DMOS power output transistors.
Many benefits are realized as a direct result of using this
mixed technology. A simplified internal block diagram of the
33996 is shown in
status information is transferred from the Power Outputs
Status register into the device’s SO Shift register. The first
eight positive transitions of SCLK will provide Any Fault (bit
23), over-voltage fault (bit 22), followed by six logic [0]s (bits
21 to 16). The next 16 successive positive transitions of
SCLK provides fault status for output 15 to output 0. Refer to
the
information. The SI / SO shifting of data follows a first-in, first-
out protocol, with both input and output words transferring the
Most Significant Bit (MSB) first.
OUTPUT DRIVER POWER SUPPLY (SOPWR
output driver and Power-ON Reset (POR) circuit. To achieve
low standby current on VPWR supply, power must be
removed from the SOPWR pin. The 33996 will be in reset
with all drivers OFF when SO
does not detect over-voltage on the SOPWR supply pin.
OUTPUT/INPUT (OUT0 – OUT15)
load.
RESET
to turn OFF all outputs, thereby clearing all internal registers.
BATTERY INPUT (VPWR
33996. The voltage on VPWR is monitored for over-voltage
protection and shutdown. An over-voltage condition (> 50μs)
on the VPWR pin will cause the 33996 to shut down all
outputs until the over-voltage condition is removed. Upon
return to normal input voltage, the outputs will respond as
programmed by the over-voltage bit in the Global Shutdown /
VPWR pin is specified as 27.5 to 35 V with 1.4V typical
hysteresis. Following an over-voltage shutdown of output
drivers, the over-voltage Fault and the Any Fault bits in the
SO bit stream will be logic [1].
PWM CONTROL (PWM)
combination of outputs. The
describes the logic for PWM control.
Retry Control register. The over-voltage threshold on the
The SOPWR pin is used to supply power to the 33996 SO
These pins are low side output switches controlling the
The Reset (
The VPWR pin is used as the input power source for the
The PWM Control pin is provided to support PWM of any
LOGIC OPERATION
(RST)
RST
Figure
) pin is the active low reset input pin used
Analog Integrated Circuit Device Data
section (below) for more
2, page 2.
LOGIC OPERATION
)
PWR
is below 2.5V. The 33996
Freescale Semiconductor
section
)