LH7A400N0F076B5 NXP Semiconductors, LH7A400N0F076B5 Datasheet - Page 40

• Manufacturer Part Number: LH7A400N0F076B5
• Manufacturer: NXP Semiconductors

Specifications of LH7A400N0F076B5

• Lead Free Status / RoHS Status: Compliant

LH7A400
40
NOTES:
1. SDRAMcmd is the combination of nRAS, nCAS, nSWE, and nSCSx.
2. tOVXXX represents tOVRA, tOVCA, tOVSVW, or tOVSC.
3. tOHXXX represents tOHRA, tOHCA, tOHSVW, or tOHSC.
4. DQM[3:0] is static LOW.
5. SCKE is static HIGH.
SDRAMcmd
NOTES:
1. SDRAMcmd is the combination of nRAS, nCAS, nSWE, and nSCSx.
2. tOVXXX represents tOVRA, tOVCA, tOVSVW, or tOVSC. Refer to the AC timing table.
3. tOHXXX represents tOHRA, tOHCA, tOHSVW, or tOHSC.
SA[13:0],
SDRAMcmd
SB[1:0]
D[31:0]
nDQM
SCLK
SA[13:0],
SB[1:0]
D[31:0]
SCKE
SCLK
t SCLK
Figure 15. Synchronous Bank Activate and Write
t OVXXX
tOVA, tOVB
Figure 14. Synchronous Burst Read
t OHA, tOHB
READ
t OHXXX
tOVC
COLUMN
Rev. 01 — 16 July 2007
BANK,
NXP Semiconductors
tOVA
tOVXXX
ACTIVE
tISD tIHD
BANK,
tOHXXX
tOHA
ROW
DATA n
DATA n + 1
DATA n + 2
DATA n + 3
tOVD
WRITE
32-Bit System-on-Chip
Preliminary data sheet
COLUMN
DATA
BANK,
tOHD
LH7A400-23
LH7A400-24