935285046551 NXP Semiconductors, 935285046551 Datasheet - Page 30

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935285046551

Manufacturer Part Number
935285046551
Description
Manufacturer
NXP Semiconductors
Datasheet

Specifications of 935285046551

Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Processing Unit
Microprocessor
Operating Supply Voltage (min)
1.7V
Operating Supply Voltage (typ)
1.8V
Operating Supply Voltage (max)
1.98V
Package Type
LQFP
Screening Level
Industrial
Pin Count
144
Mounting
Surface Mount
Rad Hardened
No
Lead Free Status / RoHS Status
Compliant
LH75401/LH75411
Watchdog Timer (WDT)
allows a selectable time-out interval to detect malfunc-
tions. The timer must be reset by software periodically.
Otherwise, a time-out occurs, interrupting the system.
If the interrupt is not serviced within the timeout period,
the WDT triggers the RCPC to generate a System
Reset. If the WDT times out, it sets a bit in the RCPC
Reset Status Register.
a time-out of 216 through 231 system clock cycles. All
Control and Status Registers for the Watchdog Timer
are accessed through the APB.
30
Motorola SPI
SSI
National Semiconductor
Microwire
The WDT consists of a 32-bit down-counter that
The WDT supports 16 selectable time intervals, for
MODE
For communications with Motorola SPI-compatible
devices. Clock polarity and phase are programmable.
For communications with Texas Instruments DSP-
compatible Serial Synchronous Interface devices.
For communications with National Semiconductor
Microwire-compatible devices.
Rev. 02 — 19 March 2009
NXP Semiconductors
Table 10. SSP Modes
DESCRIPTION
WDT FEATURES
• Counter generates an interrupt at a set interval and
• Default timeout period is set to the minimum timeout
• WDT is driven by the APB.
• Built-in protection mechanism guards against
• WDT can be programmed to trigger a System Reset
• WDT can be programmed to trigger an interrupt on
the count reloads from the pre-set value after reach-
ing zero.
of 216 system clock cycles.
interrupt-service failure.
on a timeout.
the first timeout; then, if the service routine fails to
clear the interrupt, the next WDT timeout triggers a
System Reset.
Full-duplex, 4-wire
synchronous
Full-duplex, 4-wire
synchronous
Half-duplex synchronous, using
8-bit control messages
DATA TRANSFERS
Product data sheet
System-on-Chip

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