XC56309AG100A Freescale, XC56309AG100A Datasheet - Page 105

• Manufacturer Part Number: XC56309AG100A
• Manufacturer: Freescale

Specifications of XC56309AG100A

• Device Core Size: 24b
• Format: Fixed Point
• Clock Freq (max): 100MHz
• Mips: 100
• Device Input Clock Speed: 100MHz
• Ram Size: 102KB
• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (min): 3V
• Operating Supply Voltage (max): 3.6V
• Operating Temp Range: -40C to 100C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 144
• Package Type: LQFP
• Lead Free Status / RoHS Status: Compliant

Freescale Semiconductor
M_SEN EQU 20
;*************************************************************************
;
;
;
;
;
;*************************************************************************
intequ
I_VEC EQU $0
;------------------------------------------------------------------------
; Non-Maskable interrupts
;------------------------------------------------------------------------
I_RESET EQU I_VEC+$00
I_STACK EQU I_VEC+$02
I_ILL EQU I_VEC+$04
I_DBG EQU I_VEC+$06
I_TRAP EQU I_VEC+$08
I_NMI EQU I_VEC+$0A
;------------------------------------------------------------------------
; Interrupt Request Pins
;------------------------------------------------------------------------
I_IRQA EQU I_VEC+$10
I_IRQB EQU I_VEC+$12
I_IRQC EQU I_VEC+$14
I_IRQD EQU I_VEC+$16
;------------------------------------------------------------------------
; DMA Interrupts
;------------------------------------------------------------------------
I_DMA0 EQU I_VEC+$18
I_DMA1 EQU I_VEC+$1A
I_DMA2 EQU I_VEC+$1C
I_DMA3 EQU I_VEC+$1E
I_DMA4 EQU I_VEC+$20
I_DMA5 EQU I_VEC+$22
;------------------------------------------------------------------------
; Timer Interrupts
;------------------------------------------------------------------------
I_TIM0C EQU I_VEC+$24
I_TIM0OF EQU I_VEC+$26
I_TIM1C EQU I_VEC+$28
EQUATES for DSP56309 interrupts
Last update: June 11 1995
page
opt
if
else
endif
ident
132,55,0,0,0
mex
@DEF(I_VEC)
1,0
DSP56309 Technical Data, Rev. 7
; Stack Extension Enable bit in OMR.
;leave user definition as is.
; Hardware RESET
; Stack Error
; Illegal Instruction
; Debug Request
; Trap
; Non Maskable Interrupt
; IRQA
; IRQB
; IRQC
; IRQD
; DMA Channel 0
; DMA Channel 1
; DMA Channel 2
; DMA Channel 3
; DMA Channel 4
; DMA Channel 5
; TIMER 0 compare
; TIMER 0 overflow
; TIMER 1 compare
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