TS68882MF1-16 E2V, TS68882MF1-16 Datasheet - Page 2

• Manufacturer Part Number: TS68882MF1-16
• Manufacturer: E2V

Specifications of TS68882MF1-16

• Operating Temperature (max): 125C
• Operating Temperature Classification: Military
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Not Compliant

Screening/Quality
1. Introduction
2
0852B–HIREL–06/07
This product could be manufactured in full compliance with either:
or According to e2v-Grenoble Standards
The TS68882 is a high-performance floating-point device designed to interface with the TS68020 or
TS68030 as a co-processor. This device fully supports the TS68000 virtual machine architecture, and is
implemented in HCMOS, e2v’s low power, small geometry process. This process allows CMOS and
HMOS (high-density NMOS) gates to be combined on the same device. CMOS structures are used
where speed and low power is required, and HMOS structures are used where minimum silicon area is
desired. The HCMOS technology enables the TS68882 to be very fast while consuming less power than
comparable HMOS, and still have a reasonably small die size.
With some performance degradation, the TS68882 can also be used as a peripheral processor in sys-
tems where the TS68020 or TS68030 is not the main processor (i.e., TS68000, TS68010). The
configuration of the TS68882 as a peripheral processor or co-processor may be completely transparent
to user software (i.e., the same object code may be executed in either configuration).
The architecture of the TS68882 appears to the user as a logical extension of the TS68000 Family archi-
tecture. Coupling of the co-processor interface allows the TS68020/TS68030 programmer to view the
TS68882 registers as though the registers are resident in the TS68020/TS68030. Thus, a TS68020 or
TS68030/TS68882 device pair appears to be one processor that supports seven floating-point and inte-
ger data types, and has eight integer data registers, eight address registers, and eight floating-point data
registers.
As shown in
face Unit (BIU), the Conversion Control Unit (CCU), the Execution Control Unit (ECU), and the
Microcode Control Unit (MCU). The BIU communicates with the main processor, the CCU controls the
main processor communications dialog and performs some data conversions, and the ECU and MCU
execute most floating-point calculations.
The BIU contains the co-processor interface registers, and the 32-bit control, and instruction address
registers. In addition to these registers, the register select and DSACK timing control logic is contained in
the BIU. Finally, the status flags used to monitor the status of communications with the main processor
are contained in the BIU.
• MIL-STD-883 Class B
• DESC 5962-89436
Figure
1-1, the TS68882 is internally divided into four processing elements; the Bus Inter-
Ceramic Pin Grid Array
R suffix
PGA 68
Ceramic Quad Flat Pack
CQFP 68
F suffix
e2v semiconductors SAS 2007
TS68882